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/kernel/linux/linux-5.10/arch/arm/mach-davinci/
Dda850.c59 MUX_CFG(DA850, NUART0_CTS, 3, 24, 15, 2, false)
60 MUX_CFG(DA850, NUART0_RTS, 3, 28, 15, 2, false)
61 MUX_CFG(DA850, UART0_RXD, 3, 16, 15, 2, false)
62 MUX_CFG(DA850, UART0_TXD, 3, 20, 15, 2, false)
64 MUX_CFG(DA850, UART1_RXD, 4, 24, 15, 2, false)
65 MUX_CFG(DA850, UART1_TXD, 4, 28, 15, 2, false)
67 MUX_CFG(DA850, UART2_RXD, 4, 16, 15, 2, false)
68 MUX_CFG(DA850, UART2_TXD, 4, 20, 15, 2, false)
70 MUX_CFG(DA850, I2C1_SCL, 4, 16, 15, 4, false)
71 MUX_CFG(DA850, I2C1_SDA, 4, 20, 15, 4, false)
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/wm831x/
Dotp.h19 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
20 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
21 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
26 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
27 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
28 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
33 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
34 #define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
35 #define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
40 #define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
[all …]
Dregulator.h18 #define WM831X_CS1_ENA_SHIFT 15 /* CS1_ENA */
43 #define WM831X_CS2_ENA_SHIFT 15 /* CS2_ENA */
256 #define WM831X_INTLDO_UV_STS_SHIFT 15 /* INTLDO_UV_STS */
302 #define WM831X_DC1_RATE_MASK 0xC000 /* DC1_RATE - [15:14] */
303 #define WM831X_DC1_RATE_SHIFT 14 /* DC1_RATE - [15:14] */
304 #define WM831X_DC1_RATE_WIDTH 2 /* DC1_RATE - [15:14] */
326 #define WM831X_DC1_ERR_ACT_MASK 0xC000 /* DC1_ERR_ACT - [15:14] */
327 #define WM831X_DC1_ERR_ACT_SHIFT 14 /* DC1_ERR_ACT - [15:14] */
328 #define WM831X_DC1_ERR_ACT_WIDTH 2 /* DC1_ERR_ACT - [15:14] */
350 #define WM831X_DC1_ON_SLOT_MASK 0xE000 /* DC1_ON_SLOT - [15:13] */
[all …]
/kernel/linux/linux-5.10/arch/csky/abiv2/inc/abi/
Dckmmu.h12 return mfcr("cr<0, 15>"); in read_mmu_index()
17 mtcr("cr<0, 15>", value); in write_mmu_index()
22 return mfcr("cr<2, 15>"); in read_mmu_entrylo0()
27 return mfcr("cr<3, 15>"); in read_mmu_entrylo1()
32 mtcr("cr<6, 15>", value); in write_mmu_pagemask()
37 return mfcr("cr<4, 15>"); in read_mmu_entryhi()
42 mtcr("cr<4, 15>", value); in write_mmu_entryhi()
47 return mfcr("cr<30, 15>"); in read_mmu_msa0()
52 mtcr("cr<30, 15>", value); in write_mmu_msa0()
57 return mfcr("cr<31, 15>"); in read_mmu_msa1()
[all …]
/kernel/linux/linux-5.10/drivers/infiniband/hw/i40iw/
Di40iw_register.h62 #define I40E_VFINT_DYN_CTLN1(_INTVF) (0x00003800 + ((_INTVF) * 4)) /* _i=0...15 */ /*…
65 #define I40E_PFHMC_PDINV_PMSDPARTSEL_SHIFT 15
228 #define I40E_GLPE_PFAEQEDROPCNT(_i) (0x00131440 + ((_i) * 4)) /* _i=0...15 */ /* Rese…
229 #define I40E_GLPE_PFAEQEDROPCNT_MAX_INDEX 15
232 #define I40E_GLPE_PFCEQEDROPCNT(_i) (0x001313C0 + ((_i) * 4)) /* _i=0...15 */ /* Rese…
233 #define I40E_GLPE_PFCEQEDROPCNT_MAX_INDEX 15
236 #define I40E_GLPE_PFCQEDROPCNT(_i) (0x00131340 + ((_i) * 4)) /* _i=0...15 */ /* Reset:…
237 #define I40E_GLPE_PFCQEDROPCNT_MAX_INDEX 15
315 #define I40E_GLPES_PFIP4RXDISCARD(_i) (0x00010600 + ((_i) * 4)) /* _i=0...15 */ /* R…
316 #define I40E_GLPES_PFIP4RXDISCARD_MAX_INDEX 15
[all …]
/kernel/linux/linux-5.10/sound/soc/codecs/
Dwm5100.h893 #define WM5100_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
894 #define WM5100_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
895 #define WM5100_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
1102 #define WM5100_ISRC1_INT1_ENA_SHIFT 15 /* ISRC1_INT1_ENA */
1159 #define WM5100_ISRC2_INT1_ENA_SHIFT 15 /* ISRC2_INT1_ENA */
1215 #define WM5100_FLL1_THETA_MASK 0xFFFF /* FLL1_THETA - [15:0] */
1216 #define WM5100_FLL1_THETA_SHIFT 0 /* FLL1_THETA - [15:0] */
1217 #define WM5100_FLL1_THETA_WIDTH 16 /* FLL1_THETA - [15:0] */
1239 #define WM5100_FLL1_LAMBDA_MASK 0xFFFF /* FLL1_LAMBDA - [15:0] */
1240 #define WM5100_FLL1_LAMBDA_SHIFT 0 /* FLL1_LAMBDA - [15:0] */
[all …]
Dwm9081.h90 #define WM9081_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */
91 #define WM9081_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */
92 #define WM9081_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */
348 #define WM9081_FLL_K_MASK 0xFFFF /* FLL_K - [15:0] */
349 #define WM9081_FLL_K_SHIFT 0 /* FLL_K - [15:0] */
350 #define WM9081_FLL_K_WIDTH 16 /* FLL_K - [15:0] */
479 #define WM9081_IRQ_POL_SHIFT 15 /* IRQ_POL */
517 #define WM9081_DRC_ENA_SHIFT 15 /* DRC_ENA */
538 #define WM9081_DRC_ATK_MASK 0xF000 /* DRC_ATK - [15:12] */
539 #define WM9081_DRC_ATK_SHIFT 12 /* DRC_ATK - [15:12] */
[all …]
Drt5660.h133 #define RT5660_L_MUTE (0x1 << 15)
134 #define RT5660_L_MUTE_SFT 15
147 #define RT5660_IN_DF1 (0x1 << 15)
148 #define RT5660_IN_SFT1 15
157 #define RT5660_IN_DF3 (0x1 << 15)
158 #define RT5660_IN_SFT3 15
195 #define RT5660_M_ADCMIX_L (0x1 << 15)
196 #define RT5660_M_ADCMIX_L_SFT 15
363 #define RT5660_PWR_I2S1 (0x1 << 15)
364 #define RT5660_PWR_I2S1_BIT 15
[all …]
Drt5616.h152 #define RT5616_L_MUTE (0x1 << 15)
153 #define RT5616_L_MUTE_SFT 15
166 #define RT5616_EN_DFO (0x1 << 15)
208 #define RT5616_M_MONO_ADC_L (0x1 << 15)
209 #define RT5616_M_MONO_ADC_L_SFT 15
232 #define RT5616_M_ADCMIX_L (0x1 << 15)
233 #define RT5616_M_ADCMIX_L_SFT 15
286 #define RT5616_M_STO_L_DAC_L (0x1 << 15)
287 #define RT5616_M_STO_L_DAC_L_SFT 15
304 #define RT5616_RXDP_SRC_MASK (0x1 << 15)
[all …]
Drt5651.h176 #define RT5651_L_MUTE (0x1 << 15)
177 #define RT5651_L_MUTE_SFT 15
190 #define RT5651_EN_DFO (0x1 << 15)
205 #define RT5651_INL_SEL_MASK (0x1 << 15)
206 #define RT5651_INL_SEL_SFT 15
207 #define RT5651_INL_SEL_IN4P (0x0 << 15)
208 #define RT5651_INL_SEL_MONOP (0x1 << 15)
251 #define RT5651_M_MONO_ADC_L (0x1 << 15)
252 #define RT5651_M_MONO_ADC_L_SFT 15
313 #define RT5651_M_ADCMIX_L (0x1 << 15)
[all …]
Drt5640.h182 #define RT5640_L_MUTE (0x1 << 15)
183 #define RT5640_L_MUTE_SFT 15
212 #define RT5640_INL_SEL_MASK (0x1 << 15)
213 #define RT5640_INL_SEL_SFT 15
214 #define RT5640_INL_SEL_IN4P (0x0 << 15)
215 #define RT5640_INL_SEL_MONOP (0x1 << 15)
311 #define RT5640_M_ADCMIX_L (0x1 << 15)
312 #define RT5640_M_ADCMIX_L_SFT 15
369 #define RT5640_M_STO_L_DAC_L (0x1 << 15)
370 #define RT5640_M_STO_L_DAC_L_SFT 15
[all …]
/kernel/linux/linux-5.10/arch/s390/include/asm/
Dvx-insn.h73 \opd = 15
137 \opd = 15
249 .word (0xE700 | ((v1&15) << 4))
265 .word 0xE700 | ((v1&15) << 4) | r3
286 .word 0xE700 | ((v1&15) << 4) | (v2&15)
296 .word 0xE700 | ((v1&15) << 4) | x2
306 .word 0xE700 | ((v1&15) << 4) | x2
326 .word 0xE700 | ((v1&15) << 4)
348 .word 0xE700 | (r1 << 4) | (v3&15)
370 .word 0xE700 | ((v1&15) << 4) | (v3&15)
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Domap3-echo.dts111 max-cur = /bits/ 8 <15>;
115 max-cur = /bits/ 8 <15>;
119 max-cur = /bits/ 8 <15>;
123 max-cur = /bits/ 8 <15>;
127 max-cur = /bits/ 8 <15>;
131 max-cur = /bits/ 8 <15>;
135 max-cur = /bits/ 8 <15>;
139 max-cur = /bits/ 8 <15>;
143 max-cur = /bits/ 8 <15>;
155 max-cur = /bits/ 8 <15>;
[all …]
/kernel/linux/linux-5.10/Documentation/ABI/testing/
Dsysfs-class-rapidio15 KernelVersion: v3.15
27 KernelVersion: v3.15
48 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0001
49 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0004
50 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0007
51 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0002
52 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0003
53 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0005
54 lrwxrwxrwx 1 root root 0 Feb 11 15:11 device -> ../../../0000:01:00.0
55 -r--r--r-- 1 root root 4096 Feb 11 15:11 port_destid
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/nvidia/
Dnv_dma.h57 #define SURFACE_PITCH_SRC 15:0
74 #define CLIP_POINT_X 15:0
77 #define CLIP_SIZE_WIDTH 15:0
88 #define LINE_LINES_POINT0_X 15:0
94 #define BLIT_POINT_SRC_X 15:0
97 #define BLIT_POINT_DST_X 15:0
100 #define BLIT_SIZE_WIDTH 15:0
111 #define RECT_SOLID_RECTS_Y 15:0
117 #define RECT_EXPAND_ONE_COLOR_CLIP_POINT0_X 15:0
123 #define RECT_EXPAND_ONE_COLOR_SIZE_WIDTH 15:0
[all …]
/kernel/linux/linux-5.10/arch/csky/kernel/probes/
Dsimulate-insn.c17 if (index > 15 && index < 31) in csky_insn_reg_get_val()
24 case 15: in csky_insn_reg_get_val()
46 if (index > 15 && index < 31) in csky_insn_reg_set_val()
53 case 15: in csky_insn_reg_set_val()
79 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_br32()
97 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_bt32()
117 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_bf32()
205 csky_insn_reg_set_val(regs, 15, *tmp); in simulate_pop16()
226 csky_insn_reg_set_val(regs, 15, *tmp); in simulate_pop32()
254 addr + sign_extend32((opcode & 0xffff0000) >> 15, 15)); in simulate_bez32()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dsc/
Dqp_tables.h31 { 7, { 0, 4, 5, 6, 6, 6, 6, 7, 7, 7, 9, 9, 9, 11, 15} },
32 { 7.5, { 0, 2, 4, 6, 6, 6, 6, 7, 7, 7, 8, 9, 9, 11, 15} },
47 { 15, { 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 6, 6, 6, 8} },
62 { 6, { 4, 6, 8, 8, 9, 9, 9, 10, 11, 12, 12, 12, 12, 13, 15} },
63 { 6.5, { 4, 6, 7, 8, 8, 8, 9, 10, 11, 11, 12, 12, 12, 13, 15} },
80 { 15, { 0, 1, 1, 2, 2, 3, 3, 4, 5, 5, 6, 7, 7, 8, 9} },
103 { 4, {11, 12, 13, 14, 15, 15, 15, 16, 17, 18, 18, 19, 19, 21, 22} },
104 { 4.5, {10, 11, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 21} },
105 { 5, { 9, 11, 12, 13, 14, 15, 15, 16, 17, 17, 18, 18, 19, 20, 21} },
106 { 5.5, { 8, 10, 11, 12, 13, 14, 15, 16, 16, 17, 17, 18, 18, 19, 20} },
[all …]
/kernel/linux/linux-5.10/arch/arm64/include/asm/
Darm_dsu_pmu.h18 #define CLUSTERPMCR_EL1 sys_reg(3, 0, 15, 5, 0)
19 #define CLUSTERPMCNTENSET_EL1 sys_reg(3, 0, 15, 5, 1)
20 #define CLUSTERPMCNTENCLR_EL1 sys_reg(3, 0, 15, 5, 2)
21 #define CLUSTERPMOVSSET_EL1 sys_reg(3, 0, 15, 5, 3)
22 #define CLUSTERPMOVSCLR_EL1 sys_reg(3, 0, 15, 5, 4)
23 #define CLUSTERPMSELR_EL1 sys_reg(3, 0, 15, 5, 5)
24 #define CLUSTERPMINTENSET_EL1 sys_reg(3, 0, 15, 5, 6)
25 #define CLUSTERPMINTENCLR_EL1 sys_reg(3, 0, 15, 5, 7)
26 #define CLUSTERPMCCNTR_EL1 sys_reg(3, 0, 15, 6, 0)
27 #define CLUSTERPMXEVTYPER_EL1 sys_reg(3, 0, 15, 6, 1)
[all …]
/kernel/linux/linux-5.10/drivers/scsi/
Dmesh.h17 char pad0[15];
19 char pad1[15];
21 char pad2[15];
23 char pad3[15];
25 char pad4[15];
27 char pad5[15];
29 char pad6[15];
31 char pad7[15];
33 char pad8[15];
35 char pad9[15];
[all …]
Dmac53c94.h17 char pad0[15];
19 char pad1[15];
21 char pad2[15];
23 char pad3[15];
25 char pad4[15];
27 char pad5[15];
29 char pad6[15];
31 char pad7[15];
33 char pad8[15];
35 char pad9[15];
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_vdsc.c56 { 768, 15, 6144, 3, 13, 11, 11, {
64 { 768, 15, 6144, 7, 17, 15, 15, {
67 { 11, 15, -8 }, { 12, 16, -10 }, { 13, 16, -10 },
68 { 14, 16, -12 }, { 14, 16, -12 }, { 15, 16, -12 },
73 { 768, 15, 6144, 11, 21, 19, 19, {
76 { 15, 19, -8 }, { 16, 20, -10 }, { 17, 20, -10 },
82 { 768, 15, 6144, 15, 25, 23, 27, {
83 { 0, 16, 0 }, { 7, 18, -2 }, { 15, 20, -2 }, { 16, 20, -4 },
91 { 768, 15, 6144, 19, 29, 27, 27, {
106 { 5, 13, -12 }, { 7, 13, -12 }, { 13, 15, -12 }
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/stm32/
Dpinctrl-stm32f746.c37 STM32_FUNCTION(15, "LCD_R2"),
50 STM32_FUNCTION(15, "LCD_R1"),
63 STM32_FUNCTION(15, "LCD_B5"),
75 STM32_FUNCTION(15, "LCD_VSYNC"),
86 STM32_FUNCTION(15, "LCD_R4"),
99 STM32_FUNCTION(15, "LCD_G2"),
125 STM32_FUNCTION(15, "LCD_R6"),
157 STM32_FUNCTION(15, "LCD_R4"),
169 STM32_FUNCTION(15, "LCD_R5"),
188 PINCTRL_PIN(15, "PA15"),
[all …]
Dpinctrl-stm32f769.c36 STM32_FUNCTION(15, "LCD_R2"),
50 STM32_FUNCTION(15, "LCD_R1"),
64 STM32_FUNCTION(15, "LCD_B5"),
77 STM32_FUNCTION(15, "LCD_VSYNC"),
89 STM32_FUNCTION(15, "LCD_R4"),
104 STM32_FUNCTION(15, "LCD_G2"),
134 STM32_FUNCTION(15, "LCD_R6"),
146 STM32_FUNCTION(15, "LCD_R5"),
159 STM32_FUNCTION(15, "LCD_B1"),
172 STM32_FUNCTION(15, "LCD_R4"),
[all …]
/kernel/linux/linux-5.10/tools/accounting/
Dgetdelays.c199 printf("\n\nCPU %15s%15s%15s%15s%15s\n" in print_delayacct()
200 " %15llu%15llu%15llu%15llu%15.3fms\n" in print_delayacct()
201 "IO %15s%15s%15s\n" in print_delayacct()
202 " %15llu%15llu%15llums\n" in print_delayacct()
203 "SWAP %15s%15s%15s\n" in print_delayacct()
204 " %15llu%15llu%15llums\n" in print_delayacct()
205 "RECLAIM %12s%15s%15s\n" in print_delayacct()
206 " %15llu%15llu%15llums\n" in print_delayacct()
207 "THRASHING%12s%15s%15s\n" in print_delayacct()
208 " %15llu%15llu%15llums\n", in print_delayacct()
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/broadcom/b43/
Dtables_lpphy.c1070 { .gm = 7, .pga = 15, .pad = 14, .dac = 0, .bb_mult = 152, },
1071 { .gm = 7, .pga = 15, .pad = 14, .dac = 0, .bb_mult = 147, },
1072 { .gm = 7, .pga = 15, .pad = 14, .dac = 0, .bb_mult = 143, },
1073 { .gm = 7, .pga = 15, .pad = 14, .dac = 0, .bb_mult = 139, },
1074 { .gm = 7, .pga = 15, .pad = 14, .dac = 0, .bb_mult = 135, },
1075 { .gm = 7, .pga = 15, .pad = 14, .dac = 0, .bb_mult = 131, },
1076 { .gm = 7, .pga = 15, .pad = 14, .dac = 0, .bb_mult = 128, },
1077 { .gm = 7, .pga = 15, .pad = 14, .dac = 0, .bb_mult = 124, },
1078 { .gm = 7, .pga = 15, .pad = 14, .dac = 0, .bb_mult = 121, },
1079 { .gm = 7, .pga = 15, .pad = 14, .dac = 0, .bb_mult = 117, },
[all …]

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