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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/
Darm,vexpress-juno.yaml4 $id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#
7 title: ARM Versatile Express and Juno Boards Device Tree Bindings
10 - Sudeep Holla <sudeep.holla@arm.com>
14 ARM's Versatile Express platform were built as reference designs for exploring
30 "arm,vexpress" compatible was retained in the root node, and these are
36 manual, followed by "arm,vexpress" as an additional compatible value. If
46 in MPCore configuration in a test chip on the core tile. See ARM
49 - const: arm,vexpress,v2p-ca9
50 - const: arm,vexpress
53 and Jazelle support in the Cortex A5 family. See ARM DUI 0541C.
[all …]
Dcpus.yaml4 $id: http://devicetree.org/schemas/arm/cpus.yaml#
7 title: ARM CPUs bindings
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
37 The ARM architecture, in accordance with the Devicetree Specification,
45 Usage and definition depend on ARM architecture version and
48 On uniprocessor ARM architectures previous to v7
51 On ARM 11 MPcore based systems this property is
59 On 32-bit ARM v7 or later systems this property is
68 On ARM v8 64-bit systems this property is required
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Dcoresight-cti.yaml5 $id: http://devicetree.org/schemas/arm/coresight-cti.yaml#
8 title: ARM Coresight Cross Trigger Interface (CTI) device.
32 are implementation defined, except when the CTI is connected to an ARM v8
35 In this case the ARM v8 architecture defines the required signal connections
38 indicate this feature (arm,coresight-cti-v8-arch).
53 constants defined in <dt-bindings/arm/coresight-cti-dt.h>
67 - $ref: /schemas/arm/primecell.yaml#
69 # Need a custom select here or 'arm,primecell' will match on lots of nodes
75 - arm,coresight-cti
85 - const: arm,coresight-cti
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Dpmu.yaml4 $id: http://devicetree.org/schemas/arm/pmu.yaml#
7 title: ARM Performance Monitor Units
10 - Mark Rutland <mark.rutland@arm.com>
11 - Will Deacon <will.deacon@arm.com>
14 ARM cores often have a PMU for counting cpu and cache events like cache misses
15 and hits. The interface to the PMU is part of the ARM ARM. The ARM PMU
23 - arm,armv8-pmuv3 # Only for s/w models
24 - arm,arm1136-pmu
25 - arm,arm1176-pmu
26 - arm,arm11mpcore-pmu
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Darm,realview.yaml4 $id: http://devicetree.org/schemas/arm/arm,realview.yaml#
7 title: ARM RealView Boards Device Tree Bindings
13 The ARM RealView series of reference designs were built to explore the ARM
22 - description: ARM RealView Emulation Baseboard (HBI-0140) was created
24 pluggable CPU modules, see ARM DUI 0303E.
26 - const: arm,realview-eb
27 - description: ARM RealView Platform Baseboard for ARM1176JZF-S
28 (HBI-0147) was created as a development board to test ARM TrustZone,
29 CoreSight and Intelligent Energy Management (IEM) see ARM DUI 0425F.
31 - const: arm,realview-pb1176
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Dvexpress-sysreg.txt1 ARM Versatile Express system registers
9 - compatible value : = "arm,vexpress,sysreg";
24 "arm,vexpress-sysreg,sys_led"
25 "arm,vexpress-sysreg,sys_mci"
26 "arm,vexpress-sysreg,sys_flash"
37 compatible = "arm,vexpress-sysreg";
41 compatible = "arm,vexpress-sysreg,sys_led";
47 compatible = "arm,vexpress-sysreg,sys_mci";
53 compatible = "arm,vexpress-sysreg,sys_flash";
64 node via "arm,vexpress,config-bridge" phandle and define appropriate
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Dcoresight.txt3 CoreSight components are compliant with the ARM CoreSight architecture
14 * compatible: These have to be supplemented with "arm,primecell" as
17 "arm,coresight-etb10", "arm,primecell";
20 "arm,coresight-tpiu", "arm,primecell";
26 "arm,coresight-tmc", "arm,primecell";
29 "arm,coresight-dynamic-funnel", "arm,primecell";
30 "arm,coresight-funnel", "arm,primecell"; (OBSOLETE. For
35 "arm,coresight-etm3x", "arm,primecell";
38 "arm,coresight-etm4x", "arm,primecell";
41 "arm,coresight-dynamic-replicator", "arm,primecell";
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/lg/
Dlg1313.dtsi9 #include <dt-bindings/interrupt-controller/arm-gic.h>
24 compatible = "arm,cortex-a53";
30 compatible = "arm,cortex-a53";
37 compatible = "arm,cortex-a53";
44 compatible = "arm,cortex-a53";
55 compatible = "arm,psci-0.2", "arm,psci";
64 compatible = "arm,gic-400";
73 compatible = "arm,cortex-a53-pmu";
85 compatible = "arm,armv8-timer";
134 compatible = "arm,sp804", "arm,primecell";
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Dlg1312.dtsi9 #include <dt-bindings/interrupt-controller/arm-gic.h>
24 compatible = "arm,cortex-a53";
30 compatible = "arm,cortex-a53";
37 compatible = "arm,cortex-a53";
44 compatible = "arm,cortex-a53";
55 compatible = "arm,psci-0.2", "arm,psci";
64 compatible = "arm,gic-400";
73 compatible = "arm,cortex-a53-pmu";
85 compatible = "arm,armv8-timer";
134 compatible = "arm,sp804", "arm,primecell";
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhi6220-coresight.dtsi14 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
39 compatible = "arm,coresight-tmc", "arm,primecell";
64 compatible = "arm,coresight-static-replicator";
100 compatible = "arm,coresight-tmc", "arm,primecell";
116 compatible = "arm,coresight-tpiu", "arm,primecell";
132 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
217 compatible = "arm,coresight-etm4x", "arm,primecell";
236 compatible = "arm,coresight-etm4x", "arm,primecell";
255 compatible = "arm,coresight-etm4x", "arm,primecell";
274 compatible = "arm,coresight-etm4x", "arm,primecell";
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Dhi3670.dtsi9 #include <dt-bindings/interrupt-controller/arm-gic.h>
19 compatible = "arm,psci-0.2";
59 compatible = "arm,cortex-a53";
66 compatible = "arm,cortex-a53";
73 compatible = "arm,cortex-a53";
80 compatible = "arm,cortex-a53";
87 compatible = "arm,cortex-a73";
94 compatible = "arm,cortex-a73";
101 compatible = "arm,cortex-a73";
108 compatible = "arm,cortex-a73";
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/arm/
Drtsm_ve-motherboard.dtsi3 * ARM Ltd. Fast Models
41 compatible = "arm,vexpress,config-bus";
42 arm,vexpress,config-bridge = <&v2m_sysreg>;
46 compatible = "arm,vexpress-osc";
47 arm,vexpress-sysreg,func = <1 1>;
54 compatible = "arm,vexpress-reset";
55 arm,vexpress-sysreg,func = <5 0>;
59 compatible = "arm,vexpress-muxfpga";
60 arm,vexpress-sysreg,func = <7 0>;
64 compatible = "arm,vexpress-shutdown";
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Dvexpress-v2m-rs1.dtsi3 * ARM Ltd. Versatile Express
10 * RS1 memory map ("ARM Cortex-A Series memory map" in the board's
106 arm,hbi = <0x190>;
107 arm,vexpress,site = <0>;
108 arm,v2m-memory-map = "rs1";
109 compatible = "arm,vexpress,v2m-p1", "simple-bus";
116 compatible = "arm,vexpress-flash", "cfi-flash";
121 compatible = "arm,arm-firmware-suite";
126 compatible = "arm,vexpress-psram", "mtd-ram";
157 compatible = "arm,vexpress-sysreg";
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Djuno-base.dtsi11 compatible = "arm,armv7-timer-mem";
26 compatible = "arm,mhu", "arm,primecell";
38 compatible = "arm,mmu-400", "arm,smmu-v1";
50 compatible = "arm,mmu-401", "arm,smmu-v1";
61 compatible = "arm,mmu-401", "arm,smmu-v1";
72 compatible = "arm,gic-400", "arm,cortex-a15-gic";
85 compatible = "arm,gic-v2m-frame";
91 compatible = "arm,gic-v2m-frame";
97 compatible = "arm,gic-v2m-frame";
103 compatible = "arm,gic-v2m-frame";
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dvexpress-v2m-rs1.dtsi3 * ARM Ltd. Versatile Express
10 * RS1 memory map ("ARM Cortex-A Series memory map" in the board's
106 arm,hbi = <0x190>;
107 arm,vexpress,site = <0>;
108 arm,v2m-memory-map = "rs1";
109 compatible = "arm,vexpress,v2m-p1", "simple-bus";
116 compatible = "arm,vexpress-flash", "cfi-flash";
121 compatible = "arm,arm-firmware-suite";
126 compatible = "arm,vexpress-psram", "mtd-ram";
157 compatible = "arm,vexpress-sysreg";
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Dvexpress-v2m.dtsi3 * ARM Ltd. Versatile Express
25 arm,hbi = <0x190>;
26 arm,vexpress,site = <0>;
27 compatible = "arm,vexpress,v2m-p1", "simple-bus";
34 compatible = "arm,vexpress-flash", "cfi-flash";
39 compatible = "arm,arm-firmware-suite";
44 compatible = "arm,vexpress-psram", "mtd-ram";
75 compatible = "arm,vexpress-sysreg";
82 compatible = "arm,vexpress-sysreg,sys_led";
89 compatible = "arm,vexpress-sysreg,sys_mci";
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Dvexpress-v2p-ca15_a7.dts3 * ARM Ltd. Versatile Express
16 arm,hbi = <0x249>;
17 arm,vexpress,site = <0xf>;
18 compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress";
40 compatible = "arm,cortex-a15";
50 compatible = "arm,cortex-a15";
60 compatible = "arm,cortex-a7";
70 compatible = "arm,cortex-a7";
80 compatible = "arm,cortex-a7";
90 compatible = "arm,idle-state";
[all …]
Dvexpress-v2p-ca9.dts3 * ARM Ltd. Versatile Express
16 arm,hbi = <0x191>;
17 arm,vexpress,site = <0xf>;
18 compatible = "arm,vexpress,v2p-ca9", "arm,vexpress";
40 compatible = "arm,cortex-a9";
47 compatible = "arm,cortex-a9";
54 compatible = "arm,cortex-a9";
61 compatible = "arm,cortex-a9";
87 compatible = "arm,pl111", "arm,primecell";
99 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
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Dversatile-ab.dts5 model = "ARM Versatile AB";
6 compatible = "arm,versatile-ab";
71 compatible = "arm,core-module-versatile", "syscon", "simple-mfd";
137 compatible = "arm,versatile-cm-auxosc";
161 compatible = "arm,versatile-flash", "cfi-flash";
165 compatible = "arm,arm-firmware-suite";
172 compatible = "arm,versatile-i2c";
188 compatible = "arm,versatile-lcd";
199 compatible = "arm,versatile-vic";
207 compatible = "arm,versatile-sic";
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Dhip04.dtsi89 compatible = "arm,cortex-a15";
94 compatible = "arm,cortex-a15";
99 compatible = "arm,cortex-a15";
104 compatible = "arm,cortex-a15";
109 compatible = "arm,cortex-a15";
114 compatible = "arm,cortex-a15";
119 compatible = "arm,cortex-a15";
124 compatible = "arm,cortex-a15";
129 compatible = "arm,cortex-a15";
134 compatible = "arm,cortex-a15";
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Darm-realview-pb11mp.dts30 model = "ARM RealView PB11MPcore";
31 compatible = "arm,realview-pb11mp";
54 enable-method = "arm,realview-smp";
58 compatible = "arm,arm11mpcore";
65 compatible = "arm,arm11mpcore";
72 compatible = "arm,arm11mpcore";
79 compatible = "arm,arm11mpcore";
87 compatible = "arm,tc11mp-gic";
96 compatible = "arm,l220-cache";
114 arm,shared-override;
[all …]
Dvexpress-v2p-ca15-tc1.dts3 * ARM Ltd. Versatile Express
16 arm,hbi = <0x237>;
17 arm,vexpress,site = <0xf>;
18 compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
40 compatible = "arm,cortex-a15";
46 compatible = "arm,cortex-a15";
71 compatible = "arm,hdlcd";
79 compatible = "arm,pl341", "arm,primecell";
86 compatible = "arm,sp805", "arm,primecell";
95 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
[all …]
Dhisi-x5hd2.dtsi18 compatible = "arm,cortex-a9-gic";
40 compatible = "arm,sp804", "arm,primecell";
54 compatible = "arm,sp804", "arm,primecell";
63 compatible = "arm,sp804", "arm,primecell";
72 compatible = "arm,sp804", "arm,primecell";
81 compatible = "arm,sp804", "arm,primecell";
90 compatible = "arm,pl011", "arm,primecell";
99 compatible = "arm,pl011", "arm,primecell";
108 compatible = "arm,pl011", "arm,primecell";
117 compatible = "arm,pl011", "arm,primecell";
[all …]
/kernel/linux/linux-5.10/arch/arm/crypto/
DMakefile6 obj-$(CONFIG_CRYPTO_AES_ARM) += aes-arm.o
7 obj-$(CONFIG_CRYPTO_AES_ARM_BS) += aes-arm-bs.o
8 obj-$(CONFIG_CRYPTO_SHA1_ARM) += sha1-arm.o
9 obj-$(CONFIG_CRYPTO_SHA1_ARM_NEON) += sha1-arm-neon.o
10 obj-$(CONFIG_CRYPTO_SHA256_ARM) += sha256-arm.o
11 obj-$(CONFIG_CRYPTO_SHA512_ARM) += sha512-arm.o
13 obj-$(CONFIG_CRYPTO_POLY1305_ARM) += poly1305-arm.o
17 obj-$(CONFIG_CRYPTO_AES_ARM_CE) += aes-arm-ce.o
18 obj-$(CONFIG_CRYPTO_SHA1_ARM_CE) += sha1-arm-ce.o
19 obj-$(CONFIG_CRYPTO_SHA2_ARM_CE) += sha2-arm-ce.o
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic.yaml#
7 title: ARM Generic Interrupt Controller v1 and v2
10 - Marc Zyngier <marc.zyngier@arm.com>
13 ARM SMP cores are often associated with a GIC, providing per processor
29 - arm,arm11mp-gic
30 - arm,cortex-a15-gic
31 - arm,cortex-a7-gic
32 - arm,cortex-a5-gic
33 - arm,cortex-a9-gic
34 - arm,eb11mp-gic
[all …]

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