Searched full:armv4 (Results 1 – 25 of 40) sorted by relevance
12
| /kernel/linux/linux-5.10/arch/arm/kernel/ |
| D | fiqasm.S | 29 mov r0, r0 @ avoid hazard prior to ARMv4
34 mov r0, r0 @ avoid hazard prior to ARMv4
42 mov r0, r0 @ avoid hazard prior to ARMv4
47 mov r0, r0 @ avoid hazard prior to ARMv4
|
| /kernel/linux/linux-5.10/arch/arm/include/asm/ |
| D | glue-df.h | 19 * v4_early - ARMv4 without Thumb early abort handler
20 * v4t_late - ARMv4 with Thumb late abort handler
21 * v4t_early - ARMv4 with Thumb early abort handler
|
| D | page.h | 34 * v4wt - ARMv4 with writethrough cache, without minicache
35 * v4wb - ARMv4 with writeback cache, without minicache
36 * v4_mc - ARMv4 with minicache
|
| D | tlbflush.h | 54 * v4 - ARMv4 without write buffer
55 * v4wb - ARMv4 with write buffer without I TLB flush entry instruction
56 * v4wbi - ARMv4 with write buffer with I TLB flush entry instruction
|
| D | elf.h | 93 * ARM6 or ARM7 core and "armv4[lb]" for anything based on a StrongARM-1
|
| /kernel/linux/linux-5.10/arch/arm/lib/ |
| D | Makefile | 36 lib-y += io-readsw-armv4.o io-writesw-armv4.o
40 AFLAGS_delay-loop.o += -march=armv4
|
| D | io-writesw-armv4.S | 3 * linux/arch/arm/lib/io-writesw-armv4.S
|
| D | io-readsw-armv4.S | 3 * linux/arch/arm/lib/io-readsw-armv4.S
|
| /kernel/linux/linux-5.10/arch/arm/crypto/ |
| D | Makefile | 26 sha1-arm-y := sha1-armv4-large.o sha1_glue.o
48 $(src)/poly1305-core.S_shipped: $(src)/poly1305-armv4.pl
51 $(src)/sha256-core.S_shipped: $(src)/sha256-armv4.pl
54 $(src)/sha512-core.S_shipped: $(src)/sha512-armv4.pl
|
| D | sha1-armv4-large.S | 19 @ sha1_block procedure for ARMv4.
28 @ armv4-small 392/+29% 1958/+64% 2250/+96%
29 @ armv4-compact 740/+89% 1552/+26% 1840/+22%
30 @ armv4-large 1420/+92% 1307/+19% 1370/+34%[***]
506 .asciz "SHA1 block transform for ARMv4, CRYPTOGAMS by <appro@openssl.org>"
|
| D | sha512-armv4.pl | 19 # SHA512 block procedure for ARMv4. September 2007.
637 .asciz "SHA512 block transform for ARMv4/NEON, CRYPTOGAMS by <appro\@openssl.org>"
645 $code =~ s/\bbx\s+lr\b/.word\t0xe12fff1e/gm; # make it possible to compile with -march=armv4
|
| /kernel/linux/linux-5.10/arch/arm/mm/ |
| D | copypage-v4wb.c | 11 * ARMv4 optimised copy_user_highpage
18 * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
61 * ARMv4 optimised clear_user_page
|
| D | copypage-v4mc.c | 28 * ARMv4 mini-dcache optimised copy_user_highpage
35 * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
83 * ARMv4 optimised clear_user_page
|
| D | copypage-v4wt.c | 14 * ARMv4 optimised copy_user_highpage
56 * ARMv4 optimised clear_user_page
|
| D | fsr-2level.c | 4 * The following are the standard ARMv3 and ARMv4 aborts. ARMv5
|
| D | cache-v4wt.S | 7 * ARMv4 write through cache operations support.
|
| D | proc-arm740.S | 125 string cpu_arch_name, "armv4"
|
| D | proc-fa526.S | 182 string cpu_arch_name, "armv4"
|
| D | proc-sa110.S | 193 string cpu_arch_name, "armv4"
|
| D | proc-sa1100.S | 235 string cpu_arch_name, "armv4"
|
| D | Kconfig | 165 The FA526 is a version of the ARMv4 compatible processor with
889 run on ARMv4 through to ARMv7 without modification.
|
| /kernel/linux/linux-5.10/arch/arm/mach-moxart/ |
| D | Kconfig | 14 The MOXA ART SoC is based on a Faraday FA526 ARMv4 32-bit
|
| /kernel/linux/linux-5.10/arch/arm/boot/compressed/ |
| D | head-sa1100.S | 15 .arch armv4
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | arm,integrator.yaml | 14 They are ARMv4, ARMv5 and ARMv6-capable using different core tiles,
|
| D | gemini.txt | 3 The Gemini SoC is the project name for an ARMv4 FA525-based SoC originally
|
12