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/kernel/liteos_m/
Darch_spec.md3 … --- Code of the kernel instruction architecture layer
4 │   ├── arm --- ARM32 architecture
5 │   │   ├── arm9 --- ARM9 architecture
7 │   │   ├── cortex-m3 --- Cortex-m3 architecture
9 │   │   ├── cortex-m33 --- Cortex-m33 architecture
11 …  │ │ │── NTZ --- Cortex-m33 Non-TrustZone architecture
12 …  │   │ │ └── TZ --- Cortex-m33 TrustZone architecture
14 …  │ │── NTZ --- Cortex-m33 Non-TrustZone architecture
15 …  │   │ └── TZ --- Cortex-m33 TrustZone architecture
16 │   │   └── cortex-m4 --- Cortex-m4 architecture
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DREADME.md13 **Figure1** shows the architecture of the LiteOS-M kernel.
15 **Figure 1** Architecture of the OpenHarmony LiteOS-M kernel<a name="fig0865152210223"></a>
17 ![](figures/architecture-of-openharmony-the-liteos-cortex-m-kernel.png "OpenHarmony-LiteOS-M Kernel…
25 ├── arch # Code of the kernel instruction architecture layer
26 │ ├── arm # Code of the ARM32 architecture
27 │ │ ├── arm9 # Code of the ARM9 architecture
28 │ │ ├── cortex-m3 # Code of the cortex-m3 architecture
29 │ │ ├── cortex-m33 # Code of the cortex-m33 architecture
30 │ │ ├── cortex-m4 # Code of the cortex-m4 architecture
31 │ │ ├── cortex-m7 # Code of the cortex-m7 architecture
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/kernel/linux/linux-5.10/include/linux/
Dentry-common.h13 * Define dummy _TIF work flags if not defined by the architecture or for
76 * arch_check_user_regs - Architecture specific sanity check for user mode regs
79 * Defaults to an empty implementation. Can be replaced by architecture
99 * architecture specific code.
116 * Invoked from architecture specific syscall entry code with interrupts
123 * This is invoked when there is extra architecture specific functionality
134 * Invoked from architecture specific syscall entry code with interrupts
136 * architecture specific work.
159 * Invoked from architecture specific syscall entry code with interrupts
176 * Defaults to local_irq_enable(). Can be supplied by architecture specific
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Dkgdb.h34 * This can be implemented in the architecture specific portion of kgdb.
45 * This will be implemented as a static inline per architecture. This
46 * function is called by the kgdb core to execute an architecture
104 * Functions each KGDB-supporting architecture must provide:
108 * kgdb_arch_init - Perform any architecture specific initalization.
110 * This function will handle the initalization of any architecture
116 * kgdb_arch_exit - Perform any architecture specific uninitalization.
118 * This function will handle the uninitalization of any architecture
159 * kgdb_arch_handle_exception - Handle architecture specific GDB packets.
181 * kgdb_arch_handle_qxfer_pkt - Handle architecture specific GDB XML
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/kernel/linux/linux-5.10/arch/
DKconfig3 # General architecture dependent options
12 menu "General architecture-dependent options"
155 This symbol should be selected by an architecture if 64 bit
157 though it is not a 64 bit architecture.
171 This symbol should be selected by an architecture if it can
186 inline assembler that the architecture code provides in the
191 store-and-swap instructions if the architecture has them. It
196 Any architecture with load-and-swap or store-and-swap
260 An architecture should select this when it can successfully
279 # Select if the architecture provides the arch_dma_set_uncached symbol to
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/kernel/linux/linux-5.10/drivers/watchdog/
DMakefile17 # watchdog-cards first, then the architecture specific watchdog
18 # drivers and then the architecture independent "softdog" driver.
20 # you can fall back to an architecture specific driver and if
36 # ALPHA Architecture
38 # ARM Architecture
100 # X86 (i386 + ia64 + x86_64) Architecture
150 # M68K Architecture
153 # MicroBlaze Architecture
156 # MIPS Architecture
178 # PARISC Architecture
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/kernel/linux/linux-5.10/Documentation/admin-guide/
Dkernel-parameters.rst90 ARM ARM architecture is enabled.
91 ARM64 ARM64 architecture is enabled.
105 IA-64 IA-64 architecture is enabled.
106 IMA Integrity measurement architecture is enabled.
119 M68k M68k architecture is enabled.
123 MIPS MIPS architecture is enabled.
134 PARISC The PA-RISC architecture is enabled.
139 PPC PowerPC architecture is enabled.
144 S390 S390 architecture is enabled.
152 SH SuperH architecture is enabled.
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Dcputopology.rst12 socket number, but the actual value is architecture and platform
19 architecture and platform dependent.
25 architecture and platform dependent.
31 architecture and platform dependent.
37 architecture and platform dependent.
87 Architecture-neutral, drivers/base/topology.c, exports these attributes.
94 For an architecture to support this feature, it must define some of
/kernel/linux/linux-5.10/Documentation/powerpc/
Disa-versions.rst8 CPU Architecture version
20 Power5 - PowerPC User Instruction Set Architecture Book I v2.02
21 - PowerPC Virtual Environment Architecture Book II v2.02
22 - PowerPC Operating Environment Architecture Book III v2.02
23 PPC970 - PowerPC User Instruction Set Architecture Book I v2.01
24 - PowerPC Virtual Environment Architecture Book II v2.01
25 - PowerPC Operating Environment Architecture Book III v2.01
68 …e Power ISA v3.1, "Appendix A. Notes on the Removal of Transactional Memory from the Architecture")
/kernel/linux/linux-5.10/Documentation/virt/kvm/
Dhypercalls.rst45 2. Architecture(s)
52 :Architecture: x86
60 :Architecture: x86
68 :Architecture: PPC
79 :Architecture: PPC
89 :Architecture: x86
105 :Architecture: x86
143 :Architecture: x86
164 :Architecture: x86
/kernel/linux/linux-5.10/tools/perf/pmu-events/
DREADME19 - To reduce JSON event duplication per architecture, platform JSONs may
20 use "ArchStdEvent" keyword to dereference an "Architecture standard
21 events", defined in architecture standard JSONs.
22 Architecture standard JSONs must be located in the architecture root
44 - Set of 'PMU events tables' for all known CPUs in the architecture,
61 - A 'mapping table' that maps each CPU of the architecture, to its
86 3. _All_ known CPU tables for architecture are included in the perf
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/fsl/
Dcpus.txt2 Power Architecture CPU Binding
5 Power Architecture CPUs in Freescale SOCs are represented in device trees as
17 Freescale Power Architecture) defines the architecture for Freescale
18 Power CPUs. The EREF defines some architecture categories not defined
/kernel/linux/linux-5.10/Documentation/vm/
Dmemory-model.rst18 FLATMEM, DISCONTIGMEM and SPARSEMEM. Each architecture defines what
49 To allocate the `mem_map` array, architecture specific setup code should
54 An architecture may free parts of the `mem_map` array that do not cover the
55 actual physical pages. In such case, the architecture specific
78 The architecture setup code should call :c:func:`free_area_init_node` for
118 `MAX_PHYSMEM_BITS` constants defined by each architecture that
120 physical address that an architecture supports, the
143 The architecture setup code should call sparse_init() to
162 To use vmemmap, an architecture has to reserve a range of virtual
165 the architecture should implement :c:func:`vmemmap_populate` method
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/kernel/linux/linux-5.10/scripts/package/
Dmkdebian27 # Attempt to find the correct Debian architecture
75 debarch=$(dpkg-architecture -qDEB_HOST_ARCH)
79 echo "Your architecture doesn't have its equivalent" >&2
80 echo "Debian userspace architecture defined!" >&2
81 echo "Falling back to the current host architecture ($debarch)." >&2
182 Architecture: $debarch
190 Architecture: $debarch
201 Architecture: $debarch
214 Architecture: $debarch
/kernel/linux/linux-5.10/Documentation/core-api/irq/
Dirqflags-tracing.rst15 CONFIG_PROVE_RWSEM_LOCKING will be offered on an architecture - these
19 Architecture support for this is certainly not in the "trivial"
21 state changes. But an architecture can be irq-flags-tracing enabled in a
42 - if the architecture has non-maskable interrupts then those need to be
47 implementation in an architecture: lockdep will detect that and will
/kernel/linux/linux-5.10/Documentation/features/
Darch-support.txt2 For generic kernel features that need architecture support, the
8 | ok | # feature supported by the architecture
9 |TODO| # feature not yet supported by the architecture
Dlist-arch.sh3 # of an architecture.
5 # (If no arguments are given then it will print the host architecture's status.)
12 echo "# Kernel feature support matrix of the '$ARCH' architecture:"
/kernel/linux/linux-5.10/drivers/infiniband/ulp/srpt/
Dib_dm_mad.h45 * InfiniBand Architecture Specification.
55 * Architecture Specification.
87 * Architecture Specification.
98 * the InfiniBand Architecture Specification.
132 * See also section 16.3.3.5 ServiceEntries in the InfiniBand Architecture
/kernel/linux/linux-5.10/Documentation/timers/
Dhighres.rst48 code out of the architecture-specific areas into a generic management
49 framework, as illustrated in figure #3 (OLS slides p. 18). The architecture
76 for various event driven functionalities is hardwired into the architecture
80 architecture. Another implication of the current design is that it is necessary
81 to touch all the architecture-specific implementations in order to provide new
87 to minimize the clock event related architecture dependent code to the pure
93 Clock event devices are registered either by the architecture dependent boot
116 architecture specific timer interrupt handlers and hands the control over the
131 The conversion of an architecture has no functional impact, but allows to
135 adding the kernel/time/Kconfig file to the architecture specific Kconfig and
/kernel/linux/linux-5.10/include/asm-generic/
Dtlb.h109 * And allows the architecture to provide and implement tlb_flush():
127 * If an architecture does not provide tlb_flush() a default implementation
138 * This might be useful if your architecture has size specific TLB
146 * Useful if your architecture has non-page page directories.
148 * When used, an architecture is expected to provide __tlb_remove_table()
156 * Useful if your architecture doesn't use IPIs for remote TLB invalidates
161 * Use this if your architecture lacks an efficient flush_tlb_range().
170 * This is useful if your architecture already flushes TLB entries in the
192 * Without MMU_GATHER_TABLE_FREE the architecture is assumed to have page based
201 * This allows an architecture that does not use the linux page-tables for
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/kernel/linux/linux-5.10/Documentation/arm64/
Damu.rst15 Architecture overview
19 ARMv8.4 CPU architecture.
26 Version 1 of the Activity Monitors architecture implements a counter group
39 The Activity Monitors architecture provides space for up to 16 architected
40 event counters. Future versions of the architecture may use this space to
/kernel/linux/linux-5.10/lib/crypto/
DKconfig14 Declares whether the architecture provides an arch-specific
30 Declares whether the architecture provides an arch-specific
56 Declares whether the architecture provides an arch-specific
92 Declares whether the architecture provides an arch-specific
/kernel/linux/linux-5.10/tools/memory-model/Documentation/
Dreferences.txt9 o SPARC International Inc. (Ed.). 1994. "The SPARC Architecture
12 o Compaq Computer Corporation (Ed.). 2002. "Alpha Architecture
44 o ARM Ltd. (Ed.). 2014. "ARM Architecture Reference Manual (ARMv8,
45 for ARMv8-A architecture profile)". ARM Ltd.
47 o Imagination Technologies, LTD. 2015. "MIPS(R) Architecture
54 Sewell. 2016. "Modelling the ARMv8 Architecture, Operationally:
/kernel/liteos_a/
DREADME.md15 …e for application developers. [Figure 1](#fig27311582210) shows the architecture of the OpenHarm…
17 **Figure 1** Architecture of the OpenHarmony LiteOS Cortex-A kernel<a name="fig27311582210"></a>
18 ![](figures/architecture-of-the-openharmony-liteos-cortex-a-kernel.png "architecture-of-the-openhar…
25 ├── arch # System architecture, such as ARM
26 │ └── arm # Code for ARM architecture
/kernel/linux/linux-5.10/arch/mips/jazz/
DKconfig10 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
22 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
33 the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at

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