Home
last modified time | relevance | path

Searched full:ctl0 (Results 1 – 17 of 17) sorted by relevance

/kernel/linux/linux-5.10/arch/arm/mach-sa1100/
Dneponset.c87 GPIO_LOOKUP("neponset-mdm-ctl0", 2, "rts", GPIO_ACTIVE_LOW),
88 GPIO_LOOKUP("neponset-mdm-ctl0", 3, "dtr", GPIO_ACTIVE_LOW),
99 GPIO_LOOKUP("neponset-mdm-ctl0", 0, "rts", GPIO_ACTIVE_LOW),
100 GPIO_LOOKUP("neponset-mdm-ctl0", 1, "dtr", GPIO_ACTIVE_LOW),
326 neponset_init_gpio(&d->gpio[1], &dev->dev, "neponset-mdm-ctl0", in neponset_probe()
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dtegra124-nyan-blaze-emc.dtsi82 nvidia,emc-bgbias-ctl0 = <0x00000008>;
250 nvidia,emc-bgbias-ctl0 = <0x00000008>;
418 nvidia,emc-bgbias-ctl0 = <0x00000008>;
586 nvidia,emc-bgbias-ctl0 = <0x00000008>;
754 nvidia,emc-bgbias-ctl0 = <0x00000008>;
922 nvidia,emc-bgbias-ctl0 = <0x00000008>;
1090 nvidia,emc-bgbias-ctl0 = <0x00000000>;
1258 nvidia,emc-bgbias-ctl0 = <0x00000000>;
1426 nvidia,emc-bgbias-ctl0 = <0x00000000>;
1594 nvidia,emc-bgbias-ctl0 = <0x00000000>;
Dtegra124-apalis-emc.dtsi98 nvidia,emc-bgbias-ctl0 = <0x00000008>;
195 nvidia,emc-bgbias-ctl0 = <0x00000008>;
292 nvidia,emc-bgbias-ctl0 = <0x00000008>;
389 nvidia,emc-bgbias-ctl0 = <0x00000008>;
486 nvidia,emc-bgbias-ctl0 = <0x00000008>;
583 nvidia,emc-bgbias-ctl0 = <0x00000008>;
680 nvidia,emc-bgbias-ctl0 = <0x00000000>;
777 nvidia,emc-bgbias-ctl0 = <0x00000000>;
874 nvidia,emc-bgbias-ctl0 = <0x00000000>;
971 nvidia,emc-bgbias-ctl0 = <0x00000000>;
[all …]
Dtegra124-jetson-tk1-emc.dtsi93 nvidia,emc-bgbias-ctl0 = <0x00000008>;
261 nvidia,emc-bgbias-ctl0 = <0x00000008>;
429 nvidia,emc-bgbias-ctl0 = <0x00000008>;
597 nvidia,emc-bgbias-ctl0 = <0x00000008>;
765 nvidia,emc-bgbias-ctl0 = <0x00000008>;
933 nvidia,emc-bgbias-ctl0 = <0x00000008>;
1101 nvidia,emc-bgbias-ctl0 = <0x00000000>;
1269 nvidia,emc-bgbias-ctl0 = <0x00000000>;
1437 nvidia,emc-bgbias-ctl0 = <0x00000000>;
1605 nvidia,emc-bgbias-ctl0 = <0x00000000>;
[all …]
Dtegra124-nyan-big-emc.dtsi233 nvidia,emc-bgbias-ctl0 = <0x00000008>;
401 nvidia,emc-bgbias-ctl0 = <0x00000008>;
569 nvidia,emc-bgbias-ctl0 = <0x00000008>;
737 nvidia,emc-bgbias-ctl0 = <0x00000008>;
905 nvidia,emc-bgbias-ctl0 = <0x00000008>;
1073 nvidia,emc-bgbias-ctl0 = <0x00000008>;
1241 nvidia,emc-bgbias-ctl0 = <0x00000000>;
1409 nvidia,emc-bgbias-ctl0 = <0x00000000>;
1577 nvidia,emc-bgbias-ctl0 = <0x00000000>;
1745 nvidia,emc-bgbias-ctl0 = <0x00000000>;
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/
Dbgmac.c112 int i, int len, u32 ctl0) in bgmac_dma_tx_add_buf() argument
119 ctl0 |= BGMAC_DESC_CTL0_EOT; in bgmac_dma_tx_add_buf()
127 dma_desc->ctl0 = cpu_to_le32(ctl0); in bgmac_dma_tx_add_buf()
251 u32 ctl0, ctl1; in bgmac_dma_tx_free() local
257 ctl0 = le32_to_cpu(ring->cpu_base[slot_idx].ctl0); in bgmac_dma_tx_free()
260 if (ctl0 & BGMAC_DESC_CTL0_SOF) in bgmac_dma_tx_free()
381 u32 ctl0 = 0, ctl1 = 0; in bgmac_dma_rx_setup_desc() local
384 ctl0 |= BGMAC_DESC_CTL0_EOT; in bgmac_dma_rx_setup_desc()
393 dma_desc->ctl0 = cpu_to_le32(ctl0); in bgmac_dma_rx_setup_desc()
Dbgmac.h441 __le32 ctl0; member
/kernel/linux/linux-5.10/drivers/dma/
Dpch_dma.c210 val = dma_readl(pd, CTL0); in pdc_set_dir()
225 dma_writel(pd, CTL0, val); in pdc_set_dir()
261 val = dma_readl(pd, CTL0); in pdc_set_mode()
265 dma_writel(pd, CTL0, val); in pdc_set_mode()
744 pd->regs.dma_ctl0 = dma_readl(pd, CTL0); in pch_dma_save_regs()
767 dma_writel(pd, CTL0, pd->regs.dma_ctl0); in pch_dma_restore_regs()
/kernel/linux/linux-5.10/drivers/mtd/spi-nor/controllers/
Daspeed-smc.c39 u8 ctl0; /* offset in regs of ctl for CE0 */ member
52 .ctl0 = 0x10,
61 .ctl0 = 0x04,
70 .ctl0 = 0x10,
79 .ctl0 = 0x10,
809 chip->ctl = controller->regs + info->ctl0 + cs * 4; in aspeed_smc_setup_flash()
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5_ctl.c731 * In Dual DSI case, CTL0 and CTL1 are always assigned to two DSI in mdp5_ctlm_init()
732 * interfaces to support single FLUSH feature (Flush CTL0 and CTL1 when in mdp5_ctlm_init()
733 * only write into CTL0's FLUSH register) to keep two DSI pipes in sync. in mdp5_ctlm_init()
741 /* Reserve CTL0/1 for INTF1/2 */ in mdp5_ctlm_init()
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra124-emc.yaml82 nvidia,emc-bgbias-ctl0:
307 - nvidia,emc-bgbias-ctl0
368 nvidia,emc-bgbias-ctl0 = <0x00000008>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/panel/
Dlvds.yaml88 CTL0: HSync
/kernel/linux/linux-5.10/drivers/net/wireless/broadcom/b43/
Ddma.c184 u32 ctl0 = 0, ctl1 = 0; in op64_fill_descriptor() local
196 ctl0 |= B43_DMA64_DCTL0_DTABLEEND; in op64_fill_descriptor()
198 ctl0 |= B43_DMA64_DCTL0_FRAMESTART; in op64_fill_descriptor()
200 ctl0 |= B43_DMA64_DCTL0_FRAMEEND; in op64_fill_descriptor()
202 ctl0 |= B43_DMA64_DCTL0_IRQ; in op64_fill_descriptor()
207 desc->dma64.control0 = cpu_to_le32(ctl0); in op64_fill_descriptor()
/kernel/linux/linux-5.10/drivers/net/ethernet/allwinner/
Dsun4i-emac.c252 /* set MAC CTL0 */ in emac_setup()
/kernel/linux/linux-5.10/drivers/memory/tegra/
Dtegra124-emc.c921 EMC_READ_PROP(emc_bgbias_ctl0, "nvidia,emc-bgbias-ctl0") in load_one_timing_from_dt()
/kernel/linux/linux-5.10/drivers/spi/
Dspi-sprd.c51 /* Bits & mask definition for register CTL0 */
/kernel/linux/linux-5.10/arch/x86/kernel/cpu/mce/
Dcore.c1792 * valid event later, merely don't write CTL0. in __mcheck_cpu_apply_quirks()