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/kernel/liteos_m/arch/arm/
D	Kconfig	4 # ARM has 32-bit(Aarch32) and 64-bit(Aarch64) implementations 10 32-bit ARM architecture implementations, Except the M-profile. 11 It is not limited to ARMv7-A but also ARMv7-R, ARMv8-A 32-bit and etc. 27 default "armv7-m" if ARCH_ARM_V7M 28 default "armv8-m" if ARCH_ARM_V8M 48 …onal extension to the Arm, Thumb, and ThumbEE instruction sets in the ARMv7-A and ARMv7-R profiles. 49 …VFPv3U is a variant of VFPv3 that supports the trapping of floating-point exceptions to support co… 54 …onal extension to the Arm, Thumb, and ThumbEE instruction sets in the ARMv7-A and ARMv7-R profiles. 55 …VFPv4U is a variant of VFPv4 that supports the trapping of floating-point exceptions to support co… 56 …VFPv4 and VFPv4U add both the Half-precision Extension and the fused multiply-add instructions to … [all …]
/kernel/liteos_m/
D	arch_spec.md	3 ├── arch --- Code of the kernel instruction … 4 │ ├── arm --- ARM32 architecture 5 │ │ ├── arm9 --- ARM9 architecture 6 │ │ │ └── gcc --- Implementation of the GCC toolc… 7 │ │ ├── cortex-m3 --- Cortex-m3 architecture 8 │ │ │ └── keil --- Implementation of the keil tool… 9 │ │ ├── cortex-m33 --- Cortex-m33 architecture 10 │ │ │ │── gcc --- Implementation of the GCC toolc… 11 │ │ │ │ │── NTZ --- Cortex-m33 Non-TrustZone archit… 12 │ │ │ │ └── TZ --- Cortex-m33 TrustZone architectu… [all …]
D	README.md	1 # LiteOS-M Kernel<a name="EN-US_TOPIC_0000001096757661"></a> 3 - [Introduction](#section11660541593) 4 - [Directory Structure](#section161941989596) 5 - [Constraints](#section119744591305) 6 - [Usage](#section3732185231214) 7 - [Contribution](#section1371123476307) 8 - [Repositories Involved](#section1371113476307) 12 …-M is a lightweight operating system kernel designed for the Internet of Things (IoT) field. It fe… 13 Figure1 shows the architecture of the LiteOS-M kernel. 15 Figure 1 Architecture of the OpenHarmony LiteOS-M kernel<a name="fig0865152210223"></a> [all …]
D	README_zh.md	1 # LiteOS-M内核<a name="ZH-CN_TOPIC_0000001096757661"></a> 3 - [简介](#section11660541593) 4 - [目录](#section161941989596) 5 - [约束](#section119744591305) 6 - [使用说明](#section3732185231214) 7 - [贡献](#section1371123476307) 8 - [相关仓](#section1371113476307) 12 OpenHarmony LiteOS-M内核是面向IoT领域构建的轻量级物联网操作系统内核，具有小体积、低功耗、高性能的特点，其代码结构简单，主要包括内核最小功能集、内核抽象层、可选组件以及工程目录… 14 图 1 OpenHarmony LiteOS-M核内核架构图<a name="fig0865152210223"></a> 15 ![](figures/OpenHarmony-LiteOS-M核内核架构图.png "OpenHarmony-LiteOS-M核内核架构图") [all …]
D	arch_spec_zh.md	3 ├── arch --- 内核指令架构层代码 4 │ ├── arm --- ARM32架构 5 │ │ ├── arm9 --- arm9架构 6 │ │ │ └── gcc --- gcc 编译工具链实现 7 │ │ ├── cortex-m3 --- Cortex-m3架构 8 │ │ │ └── keil --- Keil编译工具链实现 9 │ │ ├── cortex-m33 --- Cortex-m33架构 10 │ │ │ │── gcc --- GCC编译工具链实现 11 │ │ │ │ │── NTZ --- Cortex-m33非TrustZone架构实现 12 │ │ │ │ └── TZ --- Cortex-m33 TrustZone架构实现 [all …]
/kernel/uniproton/cmake/tool_chain/
D	m4-cortex-config.cmake.in	`2 include(${CMAKE_CURRENT_LIST_DIR}/UniProton-m4-cortex-targets.cmake) 14 check_required_components(UniProton-m4-cortex)`
D	rtosk_tool_chain_gcc.cmake	2 #cross-compilation config 25 set(CMAKE_C_COMPILER "${TOOLCHAIN_DIR}/arm-none-eabi-gcc" CACHE PATH "arm-gcc C compiler" FORCE) 26 set(CMAKE_ASM_COMPILER "${TOOLCHAIN_DIR}/arm-none-eabi-gcc" CACHE PATH "arm-gcc ASM compiler" FORCE) 28 if(${CPU_TYPE} STREQUAL "m4") 29 set(CMAKE_ASM_FLAGS "--specs=nosys.specs") 30 …-O2 -pipe ${STRONG_COMPILE_WARING_FLAG} ${COMPILE_WARING_FLAG} -std=gnu11 -fno-common -fomit-fram… 31 set(CMAKE_C_FLAGS "--specs=nosys.specs") #原ID形式\"888888\" 32 …-O2 -pipe ${STRONG_COMPILE_WARING_FLAG} ${COMPILE_WARING_FLAG} -std=gnu11 -fno-common -fomit-fram… 36 set(CMAKE_LINKER "${TOOLCHAIN_DIR}/arm-none-eabi-ld" CACHE STRING "" FORCE) 37 set(CMAKE_AR "${TOOLCHAIN_DIR}/arm-none-eabi-ar" CACHE STRING "" FORCE) [all …]
D	m4_cortex.cmake	149 # 否则安装目录下的配置文件(foo-config.cmake, foo-tragets.cmake等)拷贝到其它目录时无法工作。 162 configure_package_config_file(${PROJECT_SOURCE_DIR}/cmake/tool_chain/m4-cortex-config.cmake.in 163 ${CMAKE_CURRENT_BINARY_DIR}/UniProton-m4-cortex-config.cmake 177 FILE UniProton-m4-cortex-targets.cmake 181 ${CMAKE_CURRENT_BINARY_DIR}/UniProton-m4-cortex-config.cmake 227 file(GLOB hw_drv_include_files ${PROJECT_SOURCE_DIR}/src/include/uapi/hw/armv7-m/*) 230 DESTINATION ${INSTALL_M4_CORTEX_INCLUDE_DIR}/hw/armv7-m
/kernel/uniproton/
D	uniproton.gni	1 # Copyright (c) 2022-2022 Huawei Technologies Co., Ltd. All rights reserved. 8 # EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, 11 # Create: 2022-09-21 27 " --header-path $MENUCONFIG_H" + " --file-list kconfig_files.txt" + 28 " --env-list kconfig_env.txt" + " --config-out config.gni" ], 42 cmd = "grep -c '^\s$kernel_module\\|hdf_driver$\s(\s\S\s)\s{\s\$' $build_gn" 48 …cmd = "if grep -q '^\s$config\s(\s\"public\"\s)\\|module_group\s(\s\"\S\"\s)$\s{\s\$' $… 59 …cmd = "if grep -q '^\s$module_group\\|group$\s(\s\"$current_dir_name\"\s)\s{\s*\$' $build_gn… 233 KERNEL_LWIP_INCLUDE_DIRS = [ "$OSTOPDIR/net/lwip-2.1/include" ] 236 "$OSTOPDIR/net/lwip-2.1/src/driverif.c", [all …]
D	config.xml	`1 <?xml version="1.0" encoding="utf-8"?> 3 <!-- Copyright (c) 2023 Huawei Device Co., Ltd. 9 http://www.apache.org/licenses/LICENSE-2.0 19 --> 26 <tool_path>/opt/buildtools/cmake-3.20.5/bin</tool_path> 30 <project cpu_type="m4"> 32 <platform plat_name="cortex"> 33 <name>cortex</name> 34 … <compile_path_x86>/opt/buildtools/gcc-arm-none-eabi-10-2020-q4-major/bin</compile_path_x86> 35 … <compile_path_arm64>/opt/buildtools/gcc-arm-none-eabi-10-2020-q4-major/bin</compile_path_arm64> [all …]`
/kernel/linux/linux-5.10/Documentation/arm/stm32/
D	stm32f429-overview.rst	`6 ------------ 8 The STM32F429 is a Cortex-M4 MCU aimed at various applications. 11 - ARM Cortex-M4 up to 180MHz with FPU 12 - 2MB internal Flash Memory 13 - External memory support through FMC controller (PSRAM, SDRAM, NOR, NAND) 14 - I2C, SPI, SAI, CAN, USB OTG, Ethernet controllers 15 - LCD controller & Camera interface 16 - Cryptographic processor 19 --------- 23 …www.st.com/web/en/catalog/mmc/FM141/SC1169/SS1577/LN1806?ecmp=stm32f429-439_pron_pr-ces2014_nov2013`
/kernel/linux/linux-5.10/arch/arm/boot/dts/
D	vf610m4-colibri.dts	`1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * Device tree for Colibri VF61 Cortex-M4 support 8 /dts-v1/; 12 model = "VF610 Cortex-M4"; 17 stdout-path = "serial2:115200"; 47 pinctrl-names = "default"; 48 pinctrl-0 = <&pinctrl_uart2>; 53 vf610-colibri {`
D	vf610m4-cosmic.dts	`2 * Device tree for Cosmic+ VF6xx Cortex-M4 support 8 * This file is dual-licensed: you can use it either under the terms 47 /dts-v1/; 51 model = "VF610 Cortex-M4"; 76 pinctrl-names = "default"; 77 pinctrl-0 = <&pinctrl_uart3>; 82 vf610-cosmic {`
D	lpc4350.dtsi	`9 * Released under the terms of 3-clause BSD License 19 compatible = "arm,cortex-m4"; 25 compatible = "mmio-sram"; 30 compatible = "mmio-sram"; 35 compatible = "mmio-sram";`
/kernel/uniproton/build/uniproton_ci_lib/
D	globle.py	`2 # coding=utf-8 6 # Copyright (c) 2021-2023 Huawei Device Co., Ltd. 11 # http://www.apache.org/licenses/LICENSE-2.0 28 cpus_ = {'all': ['clean', 'm4'], 30 'm4': ['m4'] 33 cpu_plat = {'m4': ['cortex']`
/kernel/linux/linux-5.10/arch/arm/mm/
D	proc-v7m.S	`1 /* SPDX-License-Identifier: GPL-2.0-only / 3 linux/arch/arm/mm/proc-v7m.S 8 * This is the "shell" of the ARMv7-M processor support. 14 #include "proc-macros.S" 31 * - loc - location to jump to for soft reset 104 * This should be able to cover all ARMv7-M cores. 140 ldmia sp, {r0-r3, r12} 144 @ Special-purpose control register 150 stmiane sp, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6 152 teq r8, #0 @ re-evalutae condition [all …]`
/kernel/liteos_m/arch/arm/cortex-m4/iar/
D	los_arch_interrupt.h	2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. 3 * Copyright (c) 2020-2023 Huawei Device Co., Ltd. All rights reserved. 73 * Count of M-Core system interrupt vector. 79 * Count of M-Core interrupt vector. 90 …* The value range of the interrupt number applicable for a Cortex-M4 platformis [OS_USER_HWI_MIN,… 100 * Solution: Pass in a valid non-null hardware interrupt handling function. 130 …* Solution: Check whether the interrupt specified by the passed-in interrupt number has already be… 141 * The value range of the interrupt priority applicable for a Cortex-M4 platform is [0,15]. 162 …* Solution: Check whether the interrupt specified by the passed-in interrupt number has already be… 190 * Interrupt Priority-Level Registers. [all …]
/kernel/liteos_m/arch/arm/cortex-m4/gcc/
D	los_arch_interrupt.h	2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. 3 * Copyright (c) 2020-2023 Huawei Device Co., Ltd. All rights reserved. 73 * Count of M-Core system interrupt vector. 79 * Count of M-Core interrupt vector. 90 …* The value range of the interrupt number applicable for a Cortex-M4 platform is [OS_USER_HWI_MIN… 100 * Solution: Pass in a valid non-null hardware interrupt handling function. 130 …* Solution: Check whether the interrupt specified by the passed-in interrupt number has already be… 141 * The value range of the interrupt priority applicable for a Cortex-M4 platform is [0,15]. 162 …* Solution: Check whether the interrupt specified by the passed-in interrupt number has already be… 190 * Interrupt Priority-Level Registers. [all …]
/kernel/liteos_m/arch/
D	BUILD.gn	`1 # Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. 2 # Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. 38 if ("$board_cpu" == "arm9" \|\| "$board_cpu" == "cortex-m3" \|\| 39 "$board_cpu" == "cortex-m4" \|\| "$board_cpu" == "cortex-m7" \|\| 40 "$board_cpu" == "cortex-m33" \|\| "$board_cpu" == "cortex-m55") { 47 modules += [ "risc-v" ]`
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/stm32/
D	st,mlahb.yaml	1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 title: STMicroelectronics STM32 ML-AHB interconnect bindings 10 - Fabien Dessenne <fabien.dessenne@st.com> 11 - Arnaud Pouliquen <arnaud.pouliquen@st.com> 14 These bindings describe the STM32 SoCs ML-AHB interconnect bus which connects 15 a Cortex-M subsystem with dedicated memories. The MCU SRAM and RETRAM memory 17 using different buses (see [2]): balancing the Cortex-M firmware accesses 23 - $ref: /schemas/simple-bus.yaml# [all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/freescale/
D	fsl,vf610-mscm-ir.txt	1 Freescale Vybrid Miscellaneous System Control - Interrupt Router 8 which comes with a Cortex-A5/Cortex-M4 combination). 11 - compatible: "fsl,vf610-mscm-ir" 12 - reg: the register range of the MSCM Interrupt Router 13 - fsl,cpucfg: The handle to the MSCM CPU configuration node, required 15 - interrupt-controller: Identifies the node as an interrupt controller 16 - #interrupt-cells: Two cells, interrupt number and cells. 23 mscm_ir: interrupt-controller@40001800 { 24 compatible = "fsl,vf610-mscm-ir"; 27 interrupt-controller; [all …]
/kernel/uniproton/src/arch/cpu/armv7-m/
D	CMakeLists.txt	`3 add_subdirectory(cortex-m4)`
D	Kconfig	`1 menu "ARM7-M Sepecfic Configuration" 18 source arch/cpu/armv7-m/cortex-m4/Kconfig`
/kernel/linux/linux-5.10/arch/arm/mach-imx/
D	mach-imx7d-cm4.c	`1 // SPDX-License-Identifier: GPL-2.0 11 "fsl,imx7d-cm4", 15 DT_MACHINE_START(IMX7D, "Freescale i.MX7 Dual Cortex-M4 (Device Tree)")`
/kernel/linux/linux-5.10/drivers/firmware/imx/
D	Kconfig	`1 # SPDX-License-Identifier: GPL-2.0-only 18 The System Controller Firmware (SCFW) is a low-level system function 19 which runs on a dedicated Cortex-M core to provide power, clock, and 24 SCU firmware running on M4.`

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