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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/nvmem/
Dst,stm32-romem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/st,stm32-romem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Factory-programmed data bindings
10 This represents STM32 Factory-programmed read only non-volatile area: locked
11 flash, OTP, read-only HW regs... This contains various information such as:
16 - Fabrice Gasnier <fabrice.gasnier@st.com>
19 - $ref: "nvmem.yaml#"
24 - st,stm32f4-otp
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/kernel/linux/linux-5.10/Documentation/misc-devices/
Dad525x_dpot.rst1 .. SPDX-License-Identifier: GPL-2.0
9 settings. Access to the factory programmed tolerance is also provided, but
23 The tolerance files are the read-only factory programmed tolerance settings
24 and may vary greatly on a part-by-part basis. For exact interpretation of
35 0-0022 0-0027 0-002f
40 # ls /sys/bus/i2c/devices/0-002f/
45 # cd /sys/bus/i2c/devices/0-002f/
/kernel/linux/linux-5.10/Documentation/ABI/testing/
Dsysfs-driver-tegra-fuse1 What: /sys/devices/*/<our-device>/fuse
4 Description: read-only access to the efuses on Tegra20, Tegra30, Tegra114
6 data programmed at the factory. The data is layed out in 32bit
/kernel/linux/linux-5.10/drivers/nvmem/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
33 will be called nvmem-imx-iim.
36 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
40 This is a driver for the On-Chip OTP Controller (OCOTP) available on
41 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable
45 will be called nvmem-imx-ocotp.
48 tristate "i.MX8 SCU On-Chip OTP Controller support"
52 This is a driver for the SCU On-Chip OTP Controller (OCOTP)
88 tristate "Freescale MXS On-Chip OTP Memory Support"
97 will be called nvmem-mxs-ocotp.
[all …]
Dstm32-romem.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Factory-programmed memory read access driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
9 #include <linux/arm-smccc.h>
12 #include <linux/nvmem-provider.h>
15 /* BSEC secure service access from non-secure */
25 /* 32 (x 32-bits) lower shadow registers */
45 *buf8++ = readb_relaxed(priv->base + i); in stm32_romem_read()
57 return -EIO; in stm32_bsec_smc()
64 return -ENXIO; in stm32_bsec_smc()
[all …]
/kernel/linux/linux-5.10/drivers/mtd/chips/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 support any device that is CFI-compliant, you need to enable this
18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
22 This option enables JEDEC-style probing of flash chips which are not
24 CFI-targeted flash drivers for any chips which are identified which
26 covers most AMD/Fujitsu-compatible chips and also non-CFI
53 are expected to be wired to the CPU in 'host-endian' form.
85 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
92 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
99 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
[all …]
/kernel/linux/linux-5.10/drivers/hwmon/
Dnsa320-hwmon.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/hwmon/nsa320-hwmon.c
8 * Copyright (C) 2016 Adam Baker <linux@baker-net.org.uk>
18 #include <linux/hwmon-sysfs.h>
31 * The Zyxel hwmon MCU is a Holtek HT46R065 that is factory programmed
74 mutex_lock(&hwmon->update_lock); in nsa320_hwmon_update()
76 mcu_data = hwmon->mcu_data; in nsa320_hwmon_update()
78 if (time_after(jiffies, hwmon->last_updated + HZ) || mcu_data == 0) { in nsa320_hwmon_update()
79 gpiod_set_value(hwmon->act, 1); in nsa320_hwmon_update()
84 gpiod_set_value(hwmon->clk, 0); in nsa320_hwmon_update()
[all …]
/kernel/linux/linux-5.10/drivers/mtd/devices/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Self-contained MTD device drivers"
12 These devices come in memory configurations from 32M - 1G. If you
41 tristate "DEC MS02-NV NVRAM module support"
44 This is an MTD driver for the DEC's MS02-NV (54-20948-01) battery
45 backed-up NVRAM module. The module was originally meant as an NFS
52 The module will be called ms02-nv.
59 Sometimes DataFlash chips are packaged inside MMC-format
77 one-time-programmable (OTP) data. The first half may be written
79 other key product data. The second half is programmed with a
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/renesas/
Dbeacon-renesom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <32768>;
24 clock-output-names = "osc_32k";
28 compatible = "regulator-fixed";
29 regulator-name = "fixed-1.8V";
30 regulator-min-microvolt = <1800000>;
31 regulator-max-microvolt = <1800000>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dimx6-logicpd-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
10 stdout-path = &uart1;
18 reg_wl18xx_vmmc: regulator-wl18xx {
19 compatible = "regulator-fixed";
20 regulator-name = "vwl1837";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
24 startup-delay-us = <70000>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mm-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 compatible = "mmc-pwrseq-simple";
9 pinctrl-names = "default";
10 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
11 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
13 clock-names = "ext_clock";
14 post-power-on-delay-ms = <80>;
24 cpu-supply = <&buck2_reg>;
28 operating-points-v2 = <&ddrc_opp_table>;
30 ddrc_opp_table: opp-table {
[all …]
/kernel/linux/linux-5.10/drivers/misc/eeprom/
Dat24.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at24.c - handle most I2C EEPROMs
5 * Copyright (C) 2005-2007 David Brownell
20 #include <linux/nvmem-provider.h>
30 /* sysfs-entry will be read-only. */
32 /* sysfs-entry will be world-readable. */
36 /* Factory-programmed serial number. */
38 /* Factory-programmed mac address. */
40 /* Does not auto-rollover reads to the next slave address. */
50 * However, misconfiguration can lose data. "Set 16-bit memory address"
[all …]
/kernel/linux/linux-5.10/drivers/power/supply/
Dsmb347-charger.c1 // SPDX-License-Identifier: GPL-2.0-only
23 #include <dt-bindings/power/summit,smb347-charger.h>
26 #define SMB3XX_SOFT_TEMP_COMPENSATE_DEFAULT -1
28 /* Use default factory programmed value for hard/soft temperature limit */
29 #define SMB3XX_TEMP_USE_DEFAULT -273
34 * reloaded from non-volatile registers after POR.
132 * struct smb347_charger - smb347 charger instance
144 * @pre_charge_current: current (in uA) to use in pre-charging phase
148 * pre-charge to fast charge mode
153 * current [%100 - %130] (in degree C)
[all …]
/kernel/linux/linux-5.10/arch/mips/boot/dts/ingenic/
Dci20.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include <dt-bindings/clock/ingenic,tcu.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/regulator/active-semi,8865-regulator.h>
22 stdout-path = &uart4;
31 gpio-keys {
32 compatible = "gpio-keys";
[all …]
/kernel/linux/linux-5.10/drivers/mtd/maps/
Dichxrom.c1 // SPDX-License-Identifier: GPL-2.0-only
64 ret = pci_read_config_word(window->pdev, BIOS_CNTL, &word); in ichxrom_cleanup()
66 pci_write_config_word(window->pdev, BIOS_CNTL, word & ~1); in ichxrom_cleanup()
67 pci_dev_put(window->pdev); in ichxrom_cleanup()
70 list_for_each_entry_safe(map, scratch, &window->maps, list) { in ichxrom_cleanup()
71 if (map->rsrc.parent) in ichxrom_cleanup()
72 release_resource(&map->rsrc); in ichxrom_cleanup()
73 mtd_device_unregister(map->mtd); in ichxrom_cleanup()
74 map_destroy(map->mtd); in ichxrom_cleanup()
75 list_del(&map->list); in ichxrom_cleanup()
[all …]
Desb2rom.c1 // SPDX-License-Identifier: GPL-2.0-only
38 /* This became a 16-bit register, and EN2 has disappeared */
56 /* these are 32-bit values */
124 pci_read_config_byte(window->pdev, BIOS_CNTL, &byte); in esb2rom_cleanup()
125 pci_write_config_byte(window->pdev, BIOS_CNTL, in esb2rom_cleanup()
129 list_for_each_entry_safe(map, scratch, &window->maps, list) { in esb2rom_cleanup()
130 if (map->rsrc.parent) in esb2rom_cleanup()
131 release_resource(&map->rsrc); in esb2rom_cleanup()
132 mtd_device_unregister(map->mtd); in esb2rom_cleanup()
133 map_destroy(map->mtd); in esb2rom_cleanup()
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath10k/
Dcore.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
44 #define ATH10K_DEFAULT_NOISE_FLOOR -95
68 /* SMBIOS type structure length (excluding strings-set) */
138 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; in ATH10K_SKB_CB()
143 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); in ATH10K_SKB_RXCB()
144 return (struct ath10k_skb_rxcb *)skb->cb; in ATH10K_SKB_RXCB()
276 u32 cycle_count; /* Total on-channel time */
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/intel/ipw2x00/
Dipw2100.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 Copyright(c) 2003 - 2006 Intel Corporation. All rights reserved.
9 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
202 #define IPW2100_RSSI_TO_DBM (-98)
232 #define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32))
250 * @struct _tx_cmd - HWCommand
280 u8 wep_index; // 0 no key, 1-4 key index, 0xff immediate key
389 (x)->value = (x)->hi = 0; \
390 (x)->lo = 0x7fffffff; \
393 (x)->value = y; \
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/kernel/linux/linux-5.10/arch/arm/mach-ep93xx/
Dcore.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/arm/mach-ep93xx/core.c
19 #include <linux/dma-mapping.h>
33 #include <linux/irqchip/arm-vic.h>
39 #include <linux/platform_data/video-ep93xx.h>
40 #include <linux/platform_data/keypad-ep93xx.h>
41 #include <linux/platform_data/spi-ep93xx.h>
44 #include "gpio-ep93xx.h"
122 * ep93xx_chip_revision() - returns the EP93xx chip revision
154 .name = "gpio-ep93xx",
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/intel/i40e/
Di40e_common.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
11 * i40e_set_mac_type - Sets MAC type
21 if (hw->vendor_id == PCI_VENDOR_ID_INTEL) { in i40e_set_mac_type()
22 switch (hw->device_id) { in i40e_set_mac_type()
42 hw->mac.type = I40E_MAC_XL710; in i40e_set_mac_type()
50 hw->mac.type = I40E_MAC_X722; in i40e_set_mac_type()
53 hw->mac.type = I40E_MAC_GENERIC; in i40e_set_mac_type()
61 hw->mac.type, status); in i40e_set_mac_type()
66 * i40e_aq_str - convert AQ err code to a string
[all …]
/kernel/linux/linux-5.10/drivers/rtc/
Drtc-ds1307.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
22 #include <linux/hwmon-sysfs.h>
23 #include <linux/clk-provider.h>
28 * We can't determine type by probing, but if we expect pre-Linux code
30 * setting the date and time), Linux can ignore the non-clock features.
31 * That's a natural job for a factory or repair bench.
54 #define DS1307_REG_SECS 0x00 /* 00-59 */
58 #define DS1307_REG_MIN 0x01 /* 00-59 */
60 #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/mellanox/mlx5/core/
Deswitch.c14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
71 return -EOPNOTSUPP; in mlx5_eswitch_check()
74 return -EOPNOTSUPP; in mlx5_eswitch_check()
88 return dev->priv.eswitch; in mlx5_devlink_eswitch_get()
96 if (!esw || !MLX5_CAP_GEN(esw->dev, vport_group_manager)) in mlx5_eswitch_get_vport()
97 return ERR_PTR(-EPERM); in mlx5_eswitch_get_vport()
101 if (idx > esw->total_vports - 1) { in mlx5_eswitch_get_vport()
102 esw_debug(esw->dev, "vport out of range: num(0x%x), idx(0x%x)\n", in mlx5_eswitch_get_vport()
104 return ERR_PTR(-EINVAL); in mlx5_eswitch_get_vport()
[all …]
/kernel/linux/linux-5.10/drivers/misc/cxl/
Dpci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include <asm/pnv-pci.h>
89 #define AFUD_READ(afu, off) in_be64(afu->native->afu_desc_mmio + off)
90 #define AFUD_READ_LE(afu, off) in_le64(afu->native->afu_desc_mmio + off)
170 dev_info(&dev->dev, "dump_cxl_config_space\n"); in dump_cxl_config_space()
173 dev_info(&dev->dev, "BAR0: %#.8x\n", val); in dump_cxl_config_space()
175 dev_info(&dev->dev, "BAR1: %#.8x\n", val); in dump_cxl_config_space()
177 dev_info(&dev->dev, "BAR2: %#.8x\n", val); in dump_cxl_config_space()
179 dev_info(&dev->dev, "BAR3: %#.8x\n", val); in dump_cxl_config_space()
181 dev_info(&dev->dev, "BAR4: %#.8x\n", val); in dump_cxl_config_space()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/sfc/
Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/neterion/
Ds2io.c2 * s2io.c: A Linux PCI-X Ethernet driver for Neterion 10GbE Server NIC
3 * Copyright(c) 2002-2010 Exar Corp.
47 * Default is '2' - which means disable in promisc mode
48 * and enable in non-promiscuous mode.
60 #include <linux/dma-mapping.h>
78 #include <linux/io-64-nonatomic-lo-hi.h>
89 #include "s2io-regs.h"
104 ret = ((!(rxdp->Control_1 & RXD_OWN_XENA)) && in RXD_IS_UP2DT()
105 (GET_RXD_MARKER(rxdp->Control_2) != THE_RXD_MARK)); in RXD_IS_UP2DT()
125 return test_bit(__S2IO_STATE_CARD_UP, &sp->state); in is_s2io_card_up()
[all …]

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