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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/iommu/
Dsamsung,sysmmu.yaml13 Samsung's Exynos architecture contains System MMUs that enables scattered
23 System MMUs are in many to one relation with peripheral devices, i.e. single
24 peripheral device might have multiple System MMUs (usually one for each bus
30 MMUs.
Dti,omap-iommu.txt28 instance number should be 0 for DSP MDMA MMUs and 1 for
29 DSP EDMA MMUs.
42 /* DRA74x DSP2 MMUs */
/kernel/linux/linux-5.10/drivers/gpu/drm/panfrost/
Dpanfrost_regs.h275 #define AS_COMMAND_UPDATE 0x01 /* Broadcasts the values in AS_TRANSTAB and ASn_MEMATTR to all MMUs
276 #define AS_COMMAND_LOCK 0x02 /* Issue a lock region command to all MMUs */
277 #define AS_COMMAND_UNLOCK 0x03 /* Issue a flush region command to all MMUs */
278 #define AS_COMMAND_FLUSH 0x04 /* Flush all L2 caches then issue a flush region command to all MMUs
280 …e AS_COMMAND_FLUSH_PT 0x04 /* Flush all L2 caches then issue a flush region command to all MMUs */
282 flush all L2 caches then issue a flush region command to all MMUs */
/kernel/linux/linux-5.10/include/linux/
Dmmu_notifier.h89 * accesses to the page through the secondary MMUs and not
623 * This is safe to start by updating the secondary MMUs, because the primary MMU
625 * set_pte_at_notify() has been invoked. Updating the secondary MMUs first is
628 * old page would remain mapped readonly in the secondary MMUs after the new
Dpage-flags.h665 * through pmd_trans_huge, which in turn guarantees the secondary MMUs
667 * MMUs to call get_user_pages() only once for each compound page and
669 * MMU fault. If there will be a pmd split later, the secondary MMUs
/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/
Dmmu_public.h53 /*! Invalidate the page table cache of all MMUs
/kernel/linux/linux-5.10/Documentation/arm64/
Dbooting.rst173 - Caches, MMUs
273 The requirements described above for CPU mode, caches, MMUs, architected
/kernel/linux/linux-5.10/Documentation/translations/zh_CN/arm/
DBooting164 - 缓存,MMUs
/kernel/linux/linux-5.10/arch/sh/mm/
DKconfig175 This enables 8kB pages as supported by SH-X2 and later MMUs.
/kernel/linux/linux-5.10/arch/powerpc/mm/book3s64/
Dhash_hugetlbpage.c3 * PPC64 Huge TLB Page Support for hash based MMUs (POWER4 and later)
Dhash_hugepage.c16 * PPC64 THP Support for hash based MMUs
/kernel/linux/linux-5.10/arch/sh/include/asm/
Dpgtable_32.h9 * notes on SH-X2 MMUs and 64-bit PTEs):
30 * SH-X2 MMUs and extended PTEs
/kernel/linux/linux-5.10/arch/x86/kvm/mmu/
Dspte.h100 * SPTEs used by MMUs without A/D bits are marked with SPTE_AD_DISABLED_MASK;
/kernel/linux/linux-5.10/arch/mips/include/asm/
Dpage.h160 * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd
/kernel/linux/linux-5.10/Documentation/arm/
Dbooting.rst213 - Caches, MMUs
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/remoteproc/
Dti,omap-remoteproc.yaml59 and need the same programming in both the MMUs.
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/
Dnouveau_drm.c201 mmus[] = { in nouveau_cli_init() local
252 ret = nvif_mclass(&cli->device.object, mmus); in nouveau_cli_init()
258 ret = nvif_mmu_ctor(&cli->device.object, "drmMmu", mmus[ret].oclass, in nouveau_cli_init()
/kernel/linux/linux-5.10/drivers/scsi/sym53c8xx_2/
Dsym_malloc.c45 * with IO MMUs for PCI.
/kernel/linux/linux-5.10/arch/nds32/include/asm/
Dpgtable.h197 * any caches such that the MMUs can load it correctly.
/kernel/linux/linux-5.10/arch/xtensa/include/asm/
Dpgtable.h198 * On certain configurations of Xtensa MMUs (eg. the initial Linux config),
/kernel/linux/linux-5.10/arch/xtensa/
DKconfig522 For region protection MMUs:
/kernel/linux/linux-5.10/Documentation/vm/
Dhmm.rst330 device's MMUs with the ``mmu_notifier_invalidate_range_start(()`` and
/kernel/linux/linux-5.10/arch/powerpc/mm/nohash/
Dtlb.c49 * other sizes not listed here. The .ind field is only used on MMUs that have
/kernel/linux/linux-5.10/arch/powerpc/kernel/
Dhead_44x.S236 * The Book E MMUs are always on so we don't need to handle
Dhead_fsl_booke.S346 * The Book E MMUs are always on so we don't need to handle

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