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/kernel/linux/linux-5.10/drivers/staging/media/hantro/
DKconfig14 Rockchip and NXP i.MX8M SoCs, which accelerate video and image
20 bool "Hantro VPU i.MX8M support"
25 Enable support for i.MX8M SoCs.
/kernel/linux/linux-5.10/drivers/soc/imx/
DKconfig12 bool "i.MX8M SoC family support"
18 If you say yes here you get support for the NXP i.MX8M family
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dimx8m-clock.yaml7 title: NXP i.MX8M Family Clock Control Module Binding
13 NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock
40 for the full list of i.MX8M clock IDs.
/kernel/linux/linux-5.10/sound/soc/sof/imx/
DKconfig46 bool "SOF support for i.MX8M"
49 This adds support for Sound Open Firmware for NXP i.MX8M platforms
Dimx8m.c7 // Hardware interface for audio DSP on i.MX8M
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/fsl/
Dimx8m-ddrc.yaml7 title: i.MX8M DDR Controller
13 The DDRC block is integrated in i.MX8M for interfacing with DDR based
/kernel/linux/linux-5.10/drivers/devfreq/
DKconfig103 tristate "i.MX8M DDRC DEVFREQ Driver"
109 This adds the DEVFREQ driver for the i.MX8M DDR Controller. It allows
Dimx8m-ddrc.c38 * i.MX8M DRAM Controller clocks have the following structure (abridged):
469 MODULE_DESCRIPTION("i.MX8M DDR Controller frequency driver");
/kernel/linux/linux-5.10/drivers/phy/freescale/
DKconfig3 tristate "Freescale i.MX8M USB3 PHY"
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8mm-beacon-kit.dts13 model = "Beacon EmbeddedWorks i.MX8M Mini Development Kit";
/kernel/linux/linux-5.10/drivers/gpu/drm/mxsfb/
DKconfig19 i.MX28, i.MX6SX, i.MX7 and i.MX8M).
/kernel/linux/linux-5.10/drivers/cpufreq/
DKconfig.arm105 tristate "Freescale i.MX8M cpufreq support"
108 This adds cpufreq driver support for Freescale i.MX8M series SoCs,
Dimx-cpufreq-dt.c140 * Applies to i.MX8M series SoCs. in imx_cpufreq_dt_probe()
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/thermal/
Dimx8mm-thermal.yaml7 title: NXP i.MX8M Mini Thermal Binding
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx8mm-pinctrl.yaml39 refer to i.MX8M Mini Reference Manual for detailed CONFIG settings.
Dfsl,imx8mq-pinctrl.yaml39 refer to i.MX8M Quad Reference Manual for detailed CONFIG settings.
Dfsl,imx8mn-pinctrl.yaml39 refer to i.MX8M Nano Reference Manual for detailed CONFIG settings.
Dfsl,imx8mp-pinctrl.yaml39 refer to i.MX8M Plus Reference Manual for detailed CONFIG settings.
/kernel/linux/linux-5.10/drivers/crypto/caam/
Dctrl.c105 * Apparently on i.MX8M{Q,M,N,P} it doesn't matter if virt_en == 1 in run_descriptor_deco0()
545 { .soc_id = "i.MX8M*", .data = &caam_imx7_data },
/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/
D0033_linux_drivers_soc_scsi_spi_tee_thermal.patch742 + tristate "i.MX8M busfreq"
758 + tristate "i.MX8M PM domains"
1696 +MODULE_DESCRIPTION("NXP i.MX8M power domain driver");
D0016_linux_drivers_crypto.patch4163 * Apparently on i.MX8M{Q,M,N,P} it doesn't matter if virt_en == 1
/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/
D0005_linux_include.patch2997 +#define IMX8MQ_RESET_PCIE_CTRL_APPS_CLK_REQ 53 /* i.MX8M PCIe CTL CLK REQ */
2998 +#define IMX8MQ_RESET_PCIE2_CTRL_APPS_CLK_REQ 54 /* i.MX8M PCIe CTL CLK REQ */
D0001_linux_arch.patch75 + bool "i.MX8M busfreq"