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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/xilinx/
Dxilinx_dma.txt2 It can be configured to have one channel or two channels. If configured
3 as two channels, one is to transmit to the video device and another is
7 target devices. It can be configured to have one channel or two channels.
8 If configured as two channels, one is to transmit to the device and another
11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12 address and a memory-mapped destination address.
19 - compatible: Should be one of-
20 "xlnx,axi-vdma-1.00.a"
21 "xlnx,axi-dma-1.00.a"
22 "xlnx,axi-cdma-1.00.a"
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/kernel/linux/linux-5.10/Documentation/driver-api/iio/
Dcore.rst8 :file:`drivers/iio/industrialio-*`
11 ----------------------
13 * struct iio_dev - industrial I/O device
14 * iio_device_alloc() - allocate an :c:type:`iio_dev` from a driver
15 * iio_device_free() - free an :c:type:`iio_dev` from a driver
16 * iio_device_register() - register a device with the IIO subsystem
17 * iio_device_unregister() - unregister a device from the IIO
25 There are two ways for a user space application to interact with an IIO driver.
33 :doc:`SPI <../spi>` driver and will create two routines, probe and remove.
63 :file:`Documentation/ABI/testing/sysfs-bus-iio` file in the Linux kernel
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/kernel/linux/linux-5.10/Documentation/driver-api/
Dedac.rst5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
35 * Channel
37 A memory controller channel, responsible to communicate with a group of
38 DIMMs. Each channel has its own independent control (command) and data
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
44 controller. Typically, it contains two channels. Two channels at the
49 is calculated using two DIMMs instead of one. Due to that, it is capable
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/imx/
Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
7 nodes describing each of the two LVDS encoder channels of the bridge.
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
15 interfaces as input for each LVDS channel.
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
19 - clocks, clock-names : phandles to the LDB divider and selector clocks and to
[all …]
/kernel/linux/linux-5.10/Documentation/hwmon/
Dlm93.rst10 Addresses scanned: I2C 0x2c-0x2e
18 Addresses scanned: I2C 0x2c-0x2e
24 - Mark M. Hoffman <mhoffman@lightlink.com>
25 - Ported to 2.6 by Eric J. Bowersox <ericb@aspsys.com>
26 - Adapted to 2.6.20 by Carsten Emde <ce@osadl.org>
27 - Modified for mainline integration by Hans J. Koch <hjk@hansjkoch.de>
30 -----------------
33 Set to non-zero to force some initializations (default is 0).
38 Configures in7 and in8 limit type, where 0 means absolute and non-zero
54 --------------------
[all …]
Dpcf8591.rst17 - Aurelien Jarno <aurelien@aurel32.net>
18 - valuable contributions by Jan M. Sendler <sendler@sendler.de>,
19 - Jean Delvare <jdelvare@suse.de>
23 -----------
25 The PCF8591 is an 8-bit A/D and D/A converter (4 analog inputs and one
29 The PCF8591 has 4 analog inputs programmable as single-ended or
32 - mode 0 : four single ended inputs
35 - mode 1 : three differential inputs
39 - mode 2 : single ended and differential mixed
41 Pins AIN2 is the positive differential input for channel 3
[all …]
/kernel/linux/linux-5.10/drivers/staging/comedi/drivers/
Dcb_pcidda.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Driver for the ComputerBoards / MeasurementComputing PCI-DDA series.
9 * COMEDI - Linux Control and Measurement Device Interface
10 * Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
15 * Description: MeasurementComputing PCI-DDA series
16 * Devices: [Measurement Computing] PCI-DDA08/12 (pci-dda08/12),
17 * PCI-DDA04/12 (pci-dda04/12), PCI-DDA02/12 (pci-dda02/12),
18 * PCI-DDA08/16 (pci-dda08/16), PCI-DDA04/16 (pci-dda04/16),
19 * PCI-DDA02/16 (pci-dda02/16)
47 #define CB_DDA_DA_CTRL_DAC(x) ((x) << 2) /* Specify DAC channel */
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/kernel/linux/linux-5.10/Documentation/sound/cards/
Dcmipci.rst2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
11 CM8x38 chip can use ADC as the second DAC so that two different stereo
12 channels can be used for front/rear playbacks. Since there are two
13 DACs, both streams are handled independently unlike the 4/6ch multi-
14 channel playbacks in the section below.
20 There are slight differences between the two DACs:
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Drenesas,drif.txt1 Renesas R-Car Gen3 Digital Radio Interface controller (DRIF)
2 ------------------------------------------------------------
4 R-Car Gen3 DRIF is a SPI like receive only slave device. A general
7 +---------------------+ +---------------------+
8 | |-----SCK------->|CLK |
9 | Master |-----SS-------->|SYNC DRIFn (slave) |
10 | |-----SD0------->|D0 |
11 | |-----SD1------->|D1 |
12 +---------------------+ +---------------------+
14 As per datasheet, each DRIF channel (drifn) is made up of two internal
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/
Dfsl,mu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The Messaging Unit module enables two processors within the SoC to
21 other. The MU accomplishes synchronization using two sets of matching
22 registers (Processor A-facing, Processor B-facing).
27 - const: fsl,imx6sx-mu
28 - const: fsl,imx7ulp-mu
29 - const: fsl,imx8-mu-scu
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/kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/
Dvidioc-g-modulator.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_MODULATOR - VIDIOC_S_MODULATOR - Get or set modulator attributes
47 Modulators have two writable properties, an audio modulation set and the
52 this is a write-only ioctl, it does not return the actual audio
67 .. flat-table:: struct v4l2_modulator
68 :header-rows: 0
69 :stub-columns: 0
72 * - __u32
73 - ``index``
74 - Identifies the modulator, set by the application.
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/kernel/linux/linux-5.10/arch/s390/include/uapi/asm/
Dcmb.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
8 * struct cmbdata - channel measurement block data for user space
24 * Currently, two formats are known, which differ by the size of
25 * this structure, i.e. the last two members are only set when
26 * the extended channel measurement facility (first shipped in
47 /* enable channel measurement */
49 /* enable channel measurement */
51 /* read channel measurement data */
/kernel/linux/linux-5.10/Documentation/admin-guide/media/
Dimx.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
26 re-ordering (for example UYVY to YUYV) within the same colorspace, and
27 packed <--> planar conversion. The IDMAC can also perform a simple
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/
Dqcom,pm8xxx-xoadc.txt8 - compatible: should be one of:
9 "qcom,pm8018-adc"
10 "qcom,pm8038-adc"
11 "qcom,pm8058-adc"
12 "qcom,pm8921-adc"
14 - reg: should contain the ADC base address in the PMIC, typically
17 - xoadc-ref-supply: should reference a regulator that can supply
22 iio-bindings.txt for more details, but notice that this particular
23 ADC has a special addressing scheme that require two cells for
24 identifying each ADC channel:
[all …]
Dxilinx-xadc.txt6 Currently two different frontends for the DRP interface exist. One that is only
13 - compatible: Should be one of
14 * "xlnx,zynq-xadc-1.00.a": When using the ZYNQ device
16 * "xlnx,axi-xadc-1.00.a": When using the axi-xadc pcore to
18 - reg: Address and length of the register set for the device
19 - interrupts: Interrupt for the XADC control interface.
20 - clocks: When using the ZYNQ this must be the ZYNQ PCAP clock,
21 when using the AXI-XADC pcore this must be the clock that provides the
25 - xlnx,external-mux:
30 * "dual": External multiplexer mode is used with two
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/kernel/linux/linux-5.10/include/linux/platform_data/
Dedma.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2006-2013 Texas Instruments.
9 * This EDMA3 programming framework exposes two basic kinds of resource:
11 * Channel Triggers transfers, usually from a hardware event but
13 * Each channel is coupled to a Parameter RAM (PaRAM) slot.
23 * is driven only from a channel, which performs the transfers specified
25 * transfer completes, the "link" field may be used to reload the channel's
28 * The EDMA Channel Controller (CC) maps requests from channels into physical
29 * Transfer Controller (TC) requests when the channel triggers (by hardware
30 * or software events, or by chaining). The two physical DMA channels provided
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/kernel/linux/linux-5.10/Documentation/ABI/testing/
Dconfigfs-stp-policy1 What: /config/stp-policy
5 This group contains policies mandating Master/Channel allocation
9 What: /config/stp-policy/<device>.<policy>
19 What: /config/stp-policy/<device>.<policy>/device
26 What: /config/stp-policy/<device>.<policy>/<node>
31 use to request a master/channel to be allocated and assigned to
34 What: /config/stp-policy/<device>.<policy>/<node>/masters
39 Write two numbers: the first master and the last master number.
41 What: /config/stp-policy/<device>.<policy>/<node>/channels
46 Write two numbers: the first channel and the last channel
/kernel/linux/linux-5.10/drivers/hwmon/
Dpcf8591.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2001-2004 Aurelien Jarno <aurelien@aurel32.net>
27 " 3 = two differential inputs\n");
43 * 0x30 = two differential inputs
51 * Channel selection
52 * 0x00 = channel 0
53 * 0x01 = channel 1
54 * 0x02 = channel 2
55 * 0x03 = channel 3
64 #define REG_TO_SIGNED(reg) (((reg) & 0x80) ? ((reg) - 256) : (reg))
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Dfsl,ssi.txt4 be programmed in AC97, I2S, left-justified, or right-justified modes.
7 - compatible: Compatible list, should contain one of the following
9 fsl,mpc8610-ssi
10 fsl,imx51-ssi
11 fsl,imx35-ssi
12 fsl,imx21-ssi
13 - cell-index: The SSI, <0> = SSI1, <1> = SSI2, and so on.
14 - reg: Offset and length of the register set for the device.
15 - interrupts: <a b> where a is the interrupt number and b is a
21 - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
[all …]
Dcs53l30.txt5 - compatible : "cirrus,cs53l30"
7 - reg : the I2C address of the device
9 - VA-supply, VP-supply : power supplies for the device,
14 - reset-gpios : a GPIO spec for the reset pin.
16 - mute-gpios : a GPIO spec for the MUTE pin. The active state can be either
20 - cirrus,micbias-lvl : Set the output voltage level on the MICBIAS Pin.
21 0 = Hi-Z
25 - cirrus,use-sdout2 : This is a boolean property. If present, it indicates
29 * CS53l30 supports 4-channel data output in the same
30 * frame using two different ways:
[all …]
Dadi,axi-i2s.txt1 ADI AXI-I2S controller
7 - compatible : Must be "adi,axi-i2s-1.00.a"
8 - reg : Must contain I2S core's registers location and length
9 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
10 The controller expects two clocks, the clock used for the AXI interface and
12 - clock-names : "axi" for the clock to the AXI interface, "ref" for the sample
14 - dmas: Pairs of phandle and specifier for the DMA channels that are used by
15 the core. The core expects two dma channels if both transmit and receive are
16 enabled, one channel otherwise.
17 - dma-names : "tx" for the transmit channel, "rx" for the receive channel.
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/
Dia_css_xnr3_types.h1 /* SPDX-License-Identifier: GPL-2.0 */
20 * CSS-API header file for Extra Noise Reduction (XNR) parameters.
25 * \details The define specifies which fixed-point value represents 1.0.
31 * \details The define specifies which fixed-point value represents 1.0.
37 * \details The define specifies which fixed-point value represents 1.0.
44 * A higher number means stronger filtering. There are two values for each of
46 * sigma parameters are fixed-point values between 0.0 and 1.0, scaled with
61 * thresholding technique to avoid false coloring. There are two values for
62 * each of the two chroma planes: one for dark areas and one for bright areas.
63 * All coring parameters are fixed-point values between 0.0 and 1.0, scaled
[all …]
/kernel/linux/linux-5.10/Documentation/input/devices/
Drotary-encoder.rst2 rotary-encoder - a generic driver for GPIO connected devices
8 --------
11 peripherals with two wires. The outputs are phase-shifted by 90 degrees
16 a stable state with both outputs high (half-period mode) and some have
17 a stable state in all steps (quarter-period mode).
19 The phase diagram of these two outputs look like this::
23 Channel A ____| |_____| |_____| |____
28 Channel B |_____| |_____| |_____| |__
33 |<-------->|
36 |<-->|
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/kernel/linux/linux-5.10/drivers/hv/
Dchannel.c1 // SPDX-License-Identifier: GPL-2.0-only
26 * hv_gpadl_size - Return the real size of a gpadl, the size that Hyper-V uses
28 * For BUFFER gpadl, Hyper-V uses the exact same size as the guest does.
33 * (PAGE_SIZE - HV_HYP_PAGE_SIZE) gap. And since there are two rings in a
34 * ringbuffer, the total size for a RING gpadl that Hyper-V uses is the
43 /* The size of a ringbuffer must be page-aligned */ in hv_gpadl_size()
46 * Two things to notice here: in hv_gpadl_size()
47 * 1) We're processing two ring buffers as a unit in hv_gpadl_size()
49 * the first guest-size page of each of the two ring buffers. in hv_gpadl_size()
50 * So we effectively subtract out two guest-size pages, and add in hv_gpadl_size()
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/kernel/linux/linux-5.10/Documentation/driver-api/dmaengine/
Dclient.rst8 ``Documentation/crypto/async-tx-api.rst``
11 Below is a guide to device driver writers on how to use the Slave-DMA API of the
19 - Allocate a DMA slave channel
21 - Set slave and controller specific parameters
23 - Get a descriptor for transaction
25 - Submit the transaction
27 - Issue pending requests and wait for callback notification
31 1. Allocate a DMA slave channel
33 Channel allocation is slightly different in the slave DMA context,
34 client drivers typically need a channel from a particular DMA
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