| /kernel/linux/linux-5.10/Documentation/sh/ |
| D | register-banks.rst | 11 bank (selected by SR.RB, only r0 ... r7 are banked), whereas other families
17 In the case of this type of banking, banked registers are mapped directly to
19 can still be used to reference the banked registers (as r0_bank ... r7_bank)
21 in mind when writing code that utilizes these banked registers, for obvious
|
| /kernel/linux/linux-5.10/tools/arch/arm/include/uapi/asm/ |
| D | kvm.h | 156 * registers that are banked by security. This is 1 for the secure banked
157 * register, and 0 for the nonsecure banked register or if the register is
158 * not banked by security.
|
| /kernel/linux/linux-5.10/drivers/clocksource/ |
| D | arm_global_timer.c | 30 #define GT_CONTROL_TIMER_ENABLE BIT(0) /* this bit is NOT banked */
31 #define GT_CONTROL_COMP_ENABLE BIT(1) /* banked */
32 #define GT_CONTROL_IRQ_ENABLE BIT(2) /* banked */
33 #define GT_CONTROL_AUTO_INC BIT(3) /* banked */
|
| /kernel/linux/linux-5.10/drivers/i2c/ |
| D | i2c-stub.c | 45 /* Some chips have banked register ranges */
57 MODULE_PARM_DESC(bank_start, "First banked register");
61 MODULE_PARM_DESC(bank_end, "Last banked register");
215 * We ignore banks here, because banked chips don't use I2C in stub_xfer()
384 /* Allocate extra memory for banked register ranges */ in i2c_stub_init()
|
| /kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
| D | omap-headsmp.S | 111 * banked version is now composed of 2 bits:
114 * The Non-Secure banked register has not changed
|
| D | omap-smp.c | 212 * banked version is now composed of 2 bits: in omap4_boot_secondary()
215 * The Non-Secure banked register has not changed in omap4_boot_secondary()
|
| /kernel/linux/linux-5.10/drivers/clk/qcom/ |
| D | clk-rcg.h | 104 * @mn: mn counter (banked)
105 * @s: source selector (banked)
|
| /kernel/linux/linux-5.10/drivers/nvmem/ |
| D | imx-ocotp.c | 328 * In banked/i.MX7 mode the OTP register bank goes into waddr in imx_ocotp_write()
337 * Non-banked i.MX6 mode. in imx_ocotp_write()
368 * Note: on i.MX7 there are four data fields to write for banked write in imx_ocotp_write()
374 /* Banked/i.MX7 mode */ in imx_ocotp_write()
402 /* Non-banked i.MX6 mode */ in imx_ocotp_write()
|
| /kernel/linux/linux-5.10/arch/sh/ |
| D | Kconfig.cpu | 86 accomplishing what is taken care of by the banked registers.
|
| /kernel/linux/linux-5.10/Documentation/i2c/ |
| D | i2c-stub.rst | 57 select the active bank, as well as the range of banked registers.
|
| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-davinci.c | 222 * interrupts is equal to number of gpios else all are banked so in davinci_gpio_probe()
540 * banked IRQs. Having GPIOs in the first GPIO bank use direct in davinci_gpio_irq_setup()
541 * IRQs, while the others use banked IRQs, would need some setup in davinci_gpio_irq_setup()
|
| /kernel/linux/linux-5.10/Documentation/arm/ |
| D | setup.rst | 23 the memory is banked, then this should contain the total number
|
| /kernel/linux/linux-5.10/drivers/leds/ |
| D | leds-lp50xx.c | 284 * @num_of_banked_leds: holds the number of banked LEDs
421 dev_err(&priv->client->dev, "Cannot setup banked LEDs\n"); in lp50xx_probe_leds()
486 * banked which also is presented as 3 LEDs. in lp50xx_probe_dt()
|
| /kernel/linux/linux-5.10/drivers/irqchip/ |
| D | irq-gic-common.c | 138 * Deal with the banked PPI and SGI interrupts - disable all in gic_cpu_config()
|
| D | irq-gic.c | 18 * registers are banked per-cpu for these sources.
975 * is a banked register, we can only forward the SGI using in gic_migrate_target()
1171 /* Frankein-GIC without banked registers... */ in gic_init_bases()
1606 * There is no support for non-banked GICv1/2 register in ACPI spec. in gic_acpi_parse_madt_cpu()
|
| /kernel/liteos_a/arch/arm/arm/src/ |
| D | arm_generic_timer.c | 80 /* CNTPS AArch32 registers are banked and accessed though CNTP */
|
| /kernel/linux/linux-5.10/drivers/soundwire/ |
| D | debugfs.c | 60 /* DP0 non-banked registers */ in sdw_slave_reg_show()
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | gpio-davinci.txt | 20 - interrupts: Array of GPIO interrupt number. Only banked or unbanked IRQs are
|
| /kernel/linux/linux-5.10/drivers/phy/st/ |
| D | phy-miphy28lp.c | 437 /* Banked settings */ in miphy28lp_sata_config_gen()
464 /* Banked settings */ in miphy28lp_pcie_config_gen()
656 /* Banked settings Gen1/Gen2/Gen3 */ in miphy28lp_configure_sata()
699 /* Banked settings Gen1/Gen2 */ in miphy28lp_configure_pcie()
|
| /kernel/linux/linux-5.10/arch/arm/kernel/ |
| D | sleep.S | 115 bl cpu_init @ restore the und/abt/irq banked regs
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,gic.yaml | 111 regions, used when the GIC doesn't have banked registers. The offset
|
| /kernel/linux/linux-5.10/arch/arm64/kvm/ |
| D | aarch32.c | 163 /* Note: These now point to the banked copies */ in prepare_fault32()
|
| /kernel/linux/linux-5.10/arch/arc/kernel/ |
| D | entry-arcv2.S | 87 ; icause is banked: one per priority level
|
| /kernel/linux/linux-5.10/Documentation/virt/kvm/devices/ |
| D | arm-vgic.rst | 61 fields are not banked, but return the same value regardless of the
|
| /kernel/linux/linux-5.10/include/linux/soundwire/ |
| D | sdw_registers.h | 207 /* Banked Registers */
|