| /kernel/linux/linux-5.10/drivers/pinctrl/samsung/ |
| D | pinctrl-exynos-arm64.c | 46 /* pin banks of exynos5433 pin-controller - ALIVE */
48 /* Must start with EINTG banks, ordered by EINT group number. */
60 /* pin banks of exynos5433 pin-controller - AUD */
62 /* Must start with EINTG banks, ordered by EINT group number. */
67 /* pin banks of exynos5433 pin-controller - CPIF */
69 /* Must start with EINTG banks, ordered by EINT group number. */
73 /* pin banks of exynos5433 pin-controller - eSE */
75 /* Must start with EINTG banks, ordered by EINT group number. */
79 /* pin banks of exynos5433 pin-controller - FINGER */
81 /* Must start with EINTG banks, ordered by EINT group number. */
[all …]
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| D | pinctrl-exynos-arm.c | 90 /* pin banks of s5pv210 pin-controller */
92 /* Must start with EINTG banks, ordered by EINT group number. */
150 /* pin banks of exynos3250 pin-controller 0 */
152 /* Must start with EINTG banks, ordered by EINT group number. */
162 /* pin banks of exynos3250 pin-controller 1 */
164 /* Must start with EINTG banks, ordered by EINT group number. */
184 * PMU pad retention groups for Exynos3250 doesn't match pin banks, so handle
237 /* pin banks of exynos4210 pin-controller 0 */
239 /* Must start with EINTG banks, ordered by EINT group number. */
258 /* pin banks of exynos4210 pin-controller 1 */
[all …]
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| D | pinctrl-exynos.h | 125 * @nr_banks: count of banks being part of the mux
126 * @banks: array of banks being part of the mux
130 struct samsung_pin_bank *banks[]; member
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| /kernel/linux/linux-5.10/arch/x86/kernel/cpu/mce/ |
| D | intel.c | 27 * Also supports reliable discovery of shared banks.
36 * some MCA banks are shared across cpus. When a cpu is offlined, cmci_clear()
37 * disables CMCI on all banks owned by the cpu and clears this bitfield. At
39 * taking ownership of some of the shared MCA banks that were previously
76 static int cmci_supported(int *banks) in cmci_supported() argument
95 *banks = min_t(unsigned, MAX_NR_BANKS, cap & 0xff); in cmci_supported()
263 * Enable CMCI (Corrected Machine Check Interrupt) for available MCE banks
265 * banks.
267 static void cmci_discover(int banks) in cmci_discover() argument
275 for (i = 0; i < banks; i++) { in cmci_discover()
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
| D | powerdomains7xx_data.c | 37 .banks = 4,
78 .banks = 2,
92 .banks = 1,
105 .banks = 2,
119 .banks = 1,
132 .banks = 1,
144 .banks = 5,
170 .banks = 1,
186 .banks = 1,
201 .banks = 1,
[all …]
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| D | powerdomains44xx_data.c | 38 .banks = 5,
63 .banks = 1,
81 .banks = 2,
101 .banks = 1,
119 .banks = 3,
140 .banks = 1,
157 .banks = 1,
174 .banks = 1,
190 .banks = 1,
207 .banks = 3,
[all …]
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| D | powerdomains54xx_data.c | 36 .banks = 5,
62 .banks = 2,
91 .banks = 1,
109 .banks = 1,
126 .banks = 1,
142 .banks = 1,
159 .banks = 2,
188 .banks = 3,
209 .banks = 1,
227 .banks = 2,
[all …]
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| D | powerdomains3xxx_data.c | 37 .banks = 4,
59 .banks = 1,
75 .banks = 1,
100 .banks = 2,
122 .banks = 2,
139 .banks = 2,
156 .banks = 1,
171 .banks = 1,
192 .banks = 1,
207 .banks = 1,
[all …]
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| D | powerdomains2xxx_data.c | 31 .banks = 1,
46 .banks = 1,
61 .banks = 3,
87 .banks = 1,
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| D | powerdomains43xx_data.c | 23 .banks = 1,
37 .banks = 3,
65 .banks = 1,
95 .banks = 4,
|
| /kernel/linux/linux-5.10/arch/arm/mach-davinci/ |
| D | asp.h | 8 /* Bases of dm644x and dm355 register banks */
12 /* Bases of dm365 register banks */
15 /* Bases of dm646x register banks */
19 /* Bases of da850/da830 McASP0 register banks */
22 /* Bases of da830 McASP1 register banks */
25 /* Bases of da830 McASP2 register banks */
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| /kernel/linux/linux-5.10/arch/powerpc/platforms/embedded6xx/ |
| D | mpc10x.h | 107 #define MPC10X_MCTLR_MEM_START_1 0x80 /* Banks 0-3 */
108 #define MPC10X_MCTLR_MEM_START_2 0x84 /* Banks 4-7 */
109 #define MPC10X_MCTLR_EXT_MEM_START_1 0x88 /* Banks 0-3 */
110 #define MPC10X_MCTLR_EXT_MEM_START_2 0x8c /* Banks 4-7 */
112 #define MPC10X_MCTLR_MEM_END_1 0x90 /* Banks 0-3 */
113 #define MPC10X_MCTLR_MEM_END_2 0x94 /* Banks 4-7 */
114 #define MPC10X_MCTLR_EXT_MEM_END_1 0x98 /* Banks 0-3 */
115 #define MPC10X_MCTLR_EXT_MEM_END_2 0x9c /* Banks 4-7 */
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| /kernel/linux/linux-5.10/drivers/pinctrl/qcom/ |
| D | pinctrl-ssbi-gpio.c | 323 u8 banks = 0; in pm8xxx_pin_config_set() local
333 banks |= BIT(2); in pm8xxx_pin_config_set()
335 banks |= BIT(3); in pm8xxx_pin_config_set()
339 banks |= BIT(2); in pm8xxx_pin_config_set()
341 banks |= BIT(3); in pm8xxx_pin_config_set()
352 banks |= BIT(2); in pm8xxx_pin_config_set()
354 banks |= BIT(3); in pm8xxx_pin_config_set()
358 banks |= BIT(3); in pm8xxx_pin_config_set()
362 banks |= BIT(0) | BIT(1); in pm8xxx_pin_config_set()
367 banks |= BIT(0) | BIT(1); in pm8xxx_pin_config_set()
[all …]
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| /kernel/linux/linux-5.10/drivers/memory/ |
| D | fsl_ifc.c | 42 * This function walks IFC banks comparing "Base address" field of the CSPR
54 for (i = 0; i < fsl_ifc_ctrl_dev->banks; i++) { in fsl_ifc_find()
200 * resources for the NAND banks themselves are allocated
206 int version, banks; in fsl_ifc_ctrl_probe() local
236 banks = (version == FSL_IFC_VERSION_1_0_0) ? 4 : 8; in fsl_ifc_ctrl_probe()
237 dev_info(&dev->dev, "IFC version %d.%d, %d banks\n", in fsl_ifc_ctrl_probe()
238 version >> 24, (version >> 16) & 0xf, banks); in fsl_ifc_ctrl_probe()
241 fsl_ifc_ctrl_dev->banks = banks; in fsl_ifc_ctrl_probe()
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| /kernel/linux/linux-5.10/drivers/phy/mediatek/ |
| D | Kconfig | 14 different banks layout, the T-PHY with shared banks between
16 so you can easily distinguish them by banks layout.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | gpio-atlas7.txt | 7 - gpio-banks : How many gpio banks on this controller
28 gpio-banks = <2>;
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| D | brcm,kona-gpio.txt | 8 support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The
18 number of GPIO banks on the SoC. The interrupts must be ordered by bank,
19 starting with bank 0. There is always a 1:1 mapping between banks and
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| /kernel/linux/linux-5.10/drivers/clk/tegra/ |
| D | clk.c | 208 static int tegra_clk_periph_ctx_init(int banks) in tegra_clk_periph_ctx_init() argument
210 periph_state_ctx = kcalloc(2 * banks, sizeof(*periph_state_ctx), in tegra_clk_periph_ctx_init()
218 struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks) in tegra_clk_init() argument
222 if (WARN_ON(banks > ARRAY_SIZE(periph_regs))) in tegra_clk_init()
225 periph_clk_enb_refcnt = kcalloc(32 * banks, in tegra_clk_init()
231 periph_banks = banks; in tegra_clk_init()
242 if (tegra_clk_periph_ctx_init(banks)) { in tegra_clk_init()
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| /kernel/linux/linux-5.10/drivers/crypto/qat/qat_common/ |
| D | adf_isr.c | 129 /* Request msix irq for all banks unless SR-IOV enabled */ in adf_request_irqs()
132 struct adf_etr_bank_data *bank = &etr_data->banks[i]; in adf_request_irqs()
179 free_irq(msixe[i].vector, &etr_data->banks[i]); in adf_free_irqs()
243 tasklet_init(&priv_data->banks[i].resp_handler, in adf_setup_bh()
245 (unsigned long)&priv_data->banks[i]); in adf_setup_bh()
256 tasklet_disable(&priv_data->banks[i].resp_handler); in adf_cleanup_bh()
257 tasklet_kill(&priv_data->banks[i].resp_handler); in adf_cleanup_bh()
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| D | adf_vf_isr.c | 187 struct adf_etr_bank_data *bank = &etr_data->banks[0]; in adf_isr()
225 tasklet_init(&priv_data->banks[0].resp_handler, adf_response_handler, in adf_setup_bh()
226 (unsigned long)priv_data->banks); in adf_setup_bh()
234 tasklet_disable(&priv_data->banks[0].resp_handler); in adf_cleanup_bh()
235 tasklet_kill(&priv_data->banks[0].resp_handler); in adf_cleanup_bh()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/misc/ |
| D | qcom,fastrpc.txt | 30 = COMPUTE BANKS
31 Each subnode of the Fastrpc represents compute context banks available
33 - All Compute context banks MUST contain the following properties:
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| /kernel/linux/linux-5.10/drivers/iommu/ |
| D | msm_iommu.h | 33 /* Maximum number of context banks that can be present in IOMMU */
38 * ncb Number of context banks present on this IOMMU HW instance
46 * context_map: Bitmap to track allocated context banks
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| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_crtc.h | 36 * @ATTACHED: all the context banks are attached.
37 * @DETACHED: all the context banks are detached.
38 * @ATTACH_ALL_REQ: transient state of attaching context banks.
39 * @DETACH_ALL_REQ: transient state of detaching context banks.
62 * @state: current state of smmu context banks
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| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-bcm-kona.c | 72 struct bcm_kona_gpio_bank *banks; member
590 dev_err(dev, "Couldn't determine # GPIO banks\n"); in bcm_kona_gpio_probe()
593 return dev_err_probe(dev, ret, "Couldn't determine GPIO banks\n"); in bcm_kona_gpio_probe()
598 dev_err(dev, "Too many GPIO banks configured (max=%d)\n", in bcm_kona_gpio_probe()
602 kona_gpio->banks = devm_kcalloc(dev, in bcm_kona_gpio_probe()
604 sizeof(*kona_gpio->banks), in bcm_kona_gpio_probe()
606 if (!kona_gpio->banks) in bcm_kona_gpio_probe()
630 bank = &kona_gpio->banks[i]; in bcm_kona_gpio_probe()
651 bank = &kona_gpio->banks[i]; in bcm_kona_gpio_probe()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-st.txt | 16 First type is via irqmux, single interrupt is used by multiple gpio banks. This
17 reduces number of overall interrupts numbers required. All these banks belong to
44 with other gpio banks via irqmux.
45 a irqline and gpio banks.
|