/kernel/linux/linux-5.10/include/linux/ |
D | timecounter.h | 19 * Depending on which hardware it reads, the cycle counter may wrap 23 * @read: returns the current cycle value 27 * @mult: cycle to nanosecond multiplier 28 * @shift: cycle to nanosecond divisor (power of two) 40 * cycle counter wrap around. Initialize with 41 * timecounter_init(). Also used to convert cycle counts into the 44 * cycle counter hardware, locking issues and reading the time 45 * more often than the cycle counter wraps around. The nanosecond 48 * @cc: the cycle counter used by this instance 49 * @cycle_last: most recent cycle counter value seen by [all …]
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/kernel/linux/linux-5.10/drivers/vme/bridges/ |
D | vme_fake.c | 49 u32 cycle; member 57 u32 cycle; member 156 dma_addr_t buf_base, u32 aspace, u32 cycle) in fake_slave_set() argument 213 bridge->slaves[i].cycle = cycle; in fake_slave_set() 225 dma_addr_t *buf_base, u32 *aspace, u32 *cycle) in fake_slave_get() argument 241 *cycle = bridge->slaves[i].cycle; in fake_slave_get() 253 u32 aspace, u32 cycle, u32 dwidth) in fake_master_set() argument 321 bridge->masters[i].cycle = cycle; in fake_master_set() 340 u32 *aspace, u32 *cycle, u32 *dwidth) in __fake_master_get() argument 353 *cycle = bridge->masters[i].cycle; in __fake_master_get() [all …]
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D | vme_tsi148.c | 473 dma_addr_t pci_base, u32 aspace, u32 cycle) in tsi148_slave_set() argument 561 switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { in tsi148_slave_set() 573 /* Setup cycle types */ in tsi148_slave_set() 575 if (cycle & VME_BLT) in tsi148_slave_set() 577 if (cycle & VME_MBLT) in tsi148_slave_set() 579 if (cycle & VME_2eVME) in tsi148_slave_set() 581 if (cycle & VME_2eSST) in tsi148_slave_set() 583 if (cycle & VME_2eSSTB) in tsi148_slave_set() 591 if (cycle & VME_SUPER) in tsi148_slave_set() 593 if (cycle & VME_USER) in tsi148_slave_set() [all …]
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/kernel/linux/linux-5.10/drivers/ide/ |
D | ide-timings.c | 72 u16 cycle = 0; in ide_pio_cycle_time() local 76 cycle = id[ATA_ID_EIDE_PIO_IORDY]; in ide_pio_cycle_time() 78 cycle = id[ATA_ID_EIDE_PIO]; in ide_pio_cycle_time() 81 if (pio < 3 && cycle < t->cycle) in ide_pio_cycle_time() 82 cycle = 0; /* use standard timing */ in ide_pio_cycle_time() 86 cycle = 0; in ide_pio_cycle_time() 89 return cycle ? cycle : t->cycle; in ide_pio_cycle_time() 105 q->cycle = EZ(t->cycle, T); in ide_timing_quantize() 125 m->cycle = max(a->cycle, b->cycle); in ide_timing_merge() 151 * PIO/MWDMA cycle timing. in ide_timing_compute() [all …]
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D | tx4938ide.c | 30 unsigned int cycle = 1000000000 / clock; in tx4938ide_tune_ebusc() local 35 wt = DIV_ROUND_UP(t->act8b, cycle) - 2; in tx4938ide_tune_ebusc() 37 wt = max_t(int, wt, DIV_ROUND_UP(35, cycle)); in tx4938ide_tune_ebusc() 38 /* actual wait-cycle is max(wt & ~1, 1) */ in tx4938ide_tune_ebusc() 43 shwt = DIV_ROUND_UP(t->setup, cycle); in tx4938ide_tune_ebusc() 45 /* -DIOx recovery time (SHWT * 4) and cycle time requirement */ in tx4938ide_tune_ebusc() 46 while ((shwt * 4 + wt + (wt ? 2 : 3)) * cycle < t->cycle) in tx4938ide_tune_ebusc() 52 pr_debug("tx4938ide: ebus %d, bus cycle %dns, WT %d, SHWT %d\n", in tx4938ide_tune_ebusc() 53 ebus_ch, cycle, wt, shwt); in tx4938ide_tune_ebusc()
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/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/amdzen1/ |
D | floating-point.json | 6 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th… 13 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th… 20 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th… 27 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th… 34 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th… 41 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th… 48 …X, and SSE instructions, including moves. Each increment represents a one-cycle dispatch event. Th… 55 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th… 62 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th… 69 …, and SSE instructions, including moves. Each increment represents a one- cycle dispatch event. Th… [all …]
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/kernel/linux/linux-5.10/scripts/ |
D | headerdep.pl | 114 # $cycle[n] includes $cycle[n + 1]; 115 # $cycle[-1] will be the culprit 116 my $cycle = shift; 119 for my $i (0 .. $#$cycle - 1) { 120 $cycle->[$i]->[0] = $cycle->[$i + 1]->[0]; 122 $cycle->[-1]->[0] = 0; 124 my $first = shift @$cycle; 125 my $last = pop @$cycle; 130 for my $header (reverse @$cycle) { 141 # Find and print the smallest cycle starting in the specified node. [all …]
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/kernel/linux/linux-5.10/drivers/ata/ |
D | libata-pata-timings.c | 70 q->cycle = EZ(t->cycle, T); in ata_timing_quantize() 92 m->cycle = max(a->cycle, b->cycle); in ata_timing_merge() 133 * PIO/MW_DMA cycle timing. in ata_timing_compute() 141 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO]; in ata_timing_compute() 144 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY]; in ata_timing_compute() 146 p.cycle = id[ATA_ID_EIDE_DMA_MIN]; in ata_timing_compute() 160 * DMA cycle timing is slower/equal than the fastest PIO timing. in ata_timing_compute() 169 * Lengthen active & recovery time so that cycle time is correct. in ata_timing_compute() 177 if (t->active + t->recover < t->cycle) { in ata_timing_compute() 178 t->active += (t->cycle - (t->active + t->recover)) / 2; in ata_timing_compute() [all …]
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/ |
D | pwm-regulator.txt | 7 predefined voltage <=> duty-cycle values must be 10 Intermediary duty-cycle values which would normally 19 appropriate duty-cycle values. This allows for a much 22 assumption that a %50 duty-cycle value will cause the 33 - voltage-table: Voltage and Duty-Cycle table consisting of 2 cells 35 Second cell is duty-cycle in percent (%) 38 - pwm-dutycycle-unit: Integer value encoding the duty cycle unit. If not 46 Duty cycle values are expressed in pwm-dutycycle-unit. 71 * Inverted PWM logic, and the duty cycle range is limited 85 /* Voltage Duty-Cycle */
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/kernel/linux/linux-5.10/arch/alpha/lib/ |
D | ev6-csum_ipv6_magic.S | 36 * (we can't hide the 3-cycle latency of the unpkbw in the 6-instruction sequence) 116 cmpult $20,$3,$3 # E : (1 cycle stall on $20) 117 addq $20,$18,$20 # E : U L U L (1 cycle stall on $20) 120 addq $20,$19,$20 # E : (1 cycle stall on $20) 125 addq $18,$19,$18 # E : (1 cycle stall on $19) 128 /* (1 cycle stall on $18, 2 cycles on $20) */ 131 zapnot $0,15,$1 # U : Start folding output (1 cycle stall on $0) 133 srl $0,32,$0 # U : U L U L : (1 cycle stall on $0) 136 extwl $1,2,$2 # U : ushort[1] (1 cycle stall on $1) 137 zapnot $1,3,$0 # U : ushort[0] (1 cycle stall on $1) [all …]
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/kernel/linux/linux-5.10/drivers/pwm/ |
D | pwm-sl28cpld.c | 25 * - The hardware cannot generate a 100% duty cycle if the prescaler is 0. 30 * - The duty cycle will switch immediately and not after a complete cycle. 59 * We calculate the duty cycle like this: 124 unsigned int cycle, prescaler; in sl28cpld_pwm_apply() local 147 cycle = SL28CPLD_PWM_FROM_DUTY_CYCLE(state->duty_cycle); in sl28cpld_pwm_apply() 148 cycle = min_t(unsigned int, cycle, SL28CPLD_PWM_MAX_DUTY_CYCLE(prescaler)); in sl28cpld_pwm_apply() 152 * cycle if the prescaler is 0. Set prescaler to 1 instead. We don't in sl28cpld_pwm_apply() 158 if (cycle == SL28CPLD_PWM_MAX_DUTY_CYCLE(0)) { in sl28cpld_pwm_apply() 161 cycle = SL28CPLD_PWM_MAX_DUTY_CYCLE(1); in sl28cpld_pwm_apply() 166 * we have a valid duty cycle for the new mode. in sl28cpld_pwm_apply() [all …]
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/kernel/linux/linux-5.10/kernel/locking/ |
D | test-ww_mutex.c | 248 struct test_cycle *cycle = container_of(work, typeof(*cycle), work); in test_cycle_work() local 253 ww_mutex_lock(&cycle->a_mutex, &ctx); in test_cycle_work() 255 complete(cycle->a_signal); in test_cycle_work() 256 wait_for_completion(&cycle->b_signal); in test_cycle_work() 258 err = ww_mutex_lock(cycle->b_mutex, &ctx); in test_cycle_work() 261 ww_mutex_unlock(&cycle->a_mutex); in test_cycle_work() 262 ww_mutex_lock_slow(cycle->b_mutex, &ctx); in test_cycle_work() 263 erra = ww_mutex_lock(&cycle->a_mutex, &ctx); in test_cycle_work() 267 ww_mutex_unlock(cycle->b_mutex); in test_cycle_work() 269 ww_mutex_unlock(&cycle->a_mutex); in test_cycle_work() [all …]
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/kernel/linux/linux-5.10/drivers/net/dsa/sja1105/ |
D | sja1105_tas.c | 88 dev_dbg(ds->dev, "longest cycle time %lld ns\n", max_cycle_time); in sja1105_tas_set_runtime_params() 101 * iterate cyclically through the "schedule". Each "cycle" has an entry point 103 * hardware calls each cycle a "subschedule". 105 * Subschedule (cycle) i starts when 123 * |cycle 0|cycle 1| 151 * - cycle 0: iterates the schedule table from 0 to 2 (and back) 152 * - cycle 1: iterates the schedule table from 3 to 5 (and back) 173 int cycle = 0; in sja1105_init_scheduling() local 299 schedule_entry_points[cycle].subschindx = cycle; in sja1105_init_scheduling() 300 schedule_entry_points[cycle].delta = entry_point_delta; in sja1105_init_scheduling() [all …]
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/kernel/linux/linux-5.10/Documentation/hwmon/ |
D | dme1737.rst | 167 cycle) of the input. The chip adjusts the sampling rate based on this value. 178 manual mode, the fan speed is set by writing the duty-cycle value to the 180 current duty-cycle as set by the fan controller in the chip. All PWM outputs 198 pwm[1-3]_auto_point2_pwm full-speed duty-cycle (255, i.e., 100%) 199 pwm[1-3]_auto_point1_pwm low-speed duty-cycle 200 pwm[1-3]_auto_pwm_min min-speed duty-cycle 208 The chip adjusts the output duty-cycle linearly in the range of auto_point1_pwm 211 auto_point1_temp_hyst value, the output duty-cycle is set to the auto_pwm_min 214 duty-cycle. If any of the temperatures rise above the auto_point3_temp value, 215 all PWM outputs are set to 100% duty-cycle. [all …]
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D | vt1211.rst | 194 PWM Auto Point PWM Output Duty-Cycle 196 pwm[1-2]_auto_point4_pwm full speed duty-cycle (hard-wired to 255) 197 pwm[1-2]_auto_point3_pwm high speed duty-cycle 198 pwm[1-2]_auto_point2_pwm low speed duty-cycle 199 pwm[1-2]_auto_point1_pwm off duty-cycle (hard-wired to 0) 212 PWM output duty-cycle based on the input temperature: 215 Thermal Threshold Output Duty-Cycle Output Duty-Cycle 218 - full speed duty-cycle full speed duty-cycle 220 - high speed duty-cycle full speed duty-cycle 222 - low speed duty-cycle high speed duty-cycle [all …]
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/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/ivytown/ |
D | floating-point.json | 9 …"BriefDescription": "Number of FP Computational Uops Executed this cycle. The number of FADD, FSUB… 13 …ion": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issued this cycle.", 19 …tion": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issued this cycle", 23 …ion": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issued this cycle.", 29 …tion": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issued this cycle", 33 …ion": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issued this cycle.", 39 …tion": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issued this cycle", 49 …tion": "Number of SSE* or AVX-128 FP Computational scalar double-precision uops issued this cycle", 59 … "BriefDescription": "number of GSSE-256 Computational FP single precision uops issued this cycle", 69 … "BriefDescription": "number of AVX-256 Computational FP double precision uops issued this cycle",
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/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/ivybridge/ |
D | floating-point.json | 9 …"BriefDescription": "Number of FP Computational Uops Executed this cycle. The number of FADD, FSUB… 13 …ion": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issued this cycle.", 19 …tion": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issued this cycle", 23 …ion": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issued this cycle.", 29 …tion": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issued this cycle", 33 …ion": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issued this cycle.", 39 …tion": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issued this cycle", 49 …tion": "Number of SSE* or AVX-128 FP Computational scalar double-precision uops issued this cycle", 59 … "BriefDescription": "number of GSSE-256 Computational FP single precision uops issued this cycle", 69 … "BriefDescription": "number of AVX-256 Computational FP double precision uops issued this cycle",
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/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/s390/cf_z196/ |
D | basic.json | 7 "PublicDescription": "Cycle Count" 28 "PublicDescription": "Level-1 I-Cache Penalty Cycle Count" 42 "PublicDescription": "Level-1 D-Cache Penalty Cycle Count" 49 "PublicDescription": "Problem-State Cycle Count" 70 "PublicDescription": "Problem-State Level-1 I-Cache Penalty Cycle Count" 84 "PublicDescription": "Problem-State Level-1 D-Cache Penalty Cycle Count"
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/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/s390/cf_z13/ |
D | basic.json | 7 "PublicDescription": "Cycle Count" 28 "PublicDescription": "Level-1 I-Cache Penalty Cycle Count" 42 "PublicDescription": "Level-1 D-Cache Penalty Cycle Count" 49 "PublicDescription": "Problem-State Cycle Count" 70 "PublicDescription": "Problem-State Level-1 I-Cache Penalty Cycle Count" 84 "PublicDescription": "Problem-State Level-1 D-Cache Penalty Cycle Count"
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/input/ |
D | pwm-vibrator.txt | 4 strength increases based on the duty cycle of the enable PWM channel 5 (100% duty cycle meaning strongest vibration, 0% meaning no vibration). 8 driven at fixed duty cycle. If available this is can be used to increase 18 - direction-duty-cycle-ns: Duty cycle of the direction PWM channel in 64 direction-duty-cycle-ns = <1000000000>;
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/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/s390/cf_z10/ |
D | basic.json | 7 "PublicDescription": "Cycle Count" 28 "PublicDescription": "Level-1 I-Cache Penalty Cycle Count" 42 "PublicDescription": "Level-1 D-Cache Penalty Cycle Count" 49 "PublicDescription": "Problem-State Cycle Count" 70 "PublicDescription": "Problem-State Level-1 I-Cache Penalty Cycle Count" 84 "PublicDescription": "Problem-State Level-1 D-Cache Penalty Cycle Count"
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/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/s390/cf_zec12/ |
D | basic.json | 7 "PublicDescription": "Cycle Count" 28 "PublicDescription": "Level-1 I-Cache Penalty Cycle Count" 42 "PublicDescription": "Level-1 D-Cache Penalty Cycle Count" 49 "PublicDescription": "Problem-State Cycle Count" 70 "PublicDescription": "Problem-State Level-1 I-Cache Penalty Cycle Count" 84 "PublicDescription": "Problem-State Level-1 D-Cache Penalty Cycle Count"
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/kernel/linux/linux-5.10/tools/power/cpupower/bench/ |
D | benchmark.c | 80 unsigned int _round, cycle; in start_benchmark() local 125 for (cycle = 0; cycle < config->cycles; cycle++) { in start_benchmark() 132 printf("performance cycle took %lius, " in start_benchmark() 151 for (cycle = 0; cycle < config->cycles; cycle++) { in start_benchmark() 158 printf("powersave cycle took %lius, " in start_benchmark()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
D | renesas,sh-msiof.yaml | 105 - 50 # 0.5-clock-cycle delay 106 - 100 # 1-clock-cycle delay 107 - 150 # 1.5-clock-cycle delay 108 - 200 # 2-clock-cycle delay 115 - 50 # 0.5-clock-cycle delay 116 - 100 # 1-clock-cycle delay 117 - 150 # 1.5-clock-cycle delay 118 - 200 # 2-clock-cycle delay 119 - 300 # 3-clock-cycle delay
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/kernel/linux/linux-5.10/sound/firewire/ |
D | amdtp-stream.c | 220 // of syt interval. This comes from the interval of isoc cycle. As 1394 in amdtp_stream_add_pcm_hw_constraints() 507 static void build_it_pkt_header(struct amdtp_stream *s, unsigned int cycle, in build_it_pkt_header() argument 528 trace_amdtp_packet(s, cycle, cip_header, payload_length, data_blocks, in build_it_pkt_header() 628 static int parse_ir_ctx_header(struct amdtp_stream *s, unsigned int cycle, in parse_ir_ctx_header() argument 670 trace_amdtp_packet(s, cycle, cip_header, *payload_length, *data_blocks, in parse_ir_ctx_header() 685 static inline u32 increment_cycle_count(u32 cycle, unsigned int addend) in increment_cycle_count() argument 687 cycle += addend; in increment_cycle_count() 688 if (cycle >= OHCI_MAX_SECOND * CYCLES_PER_SECOND) in increment_cycle_count() 689 cycle -= OHCI_MAX_SECOND * CYCLES_PER_SECOND; in increment_cycle_count() 690 return cycle; in increment_cycle_count() [all …]
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