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/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dmsm8916-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8 blsp1_uart1_default: blsp1-uart1-default {
13 drive-strength = <16>;
14 bias-disable;
17 blsp1_uart1_sleep: blsp1-uart1-sleep {
21 drive-strength = <2>;
22 bias-pull-down;
25 blsp1_uart2_default: blsp1-uart2-default {
29 drive-strength = <16>;
[all …]
Dmsm8996-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
17 drive-strength = <2>; /* 2 mA */
18 bias-pull-down; /* pull down */
19 input-enable;
32 drive-strength = <16>;
33 bias-disable;
34 output-low;
44 drive-strength = <16>;
45 bias-pull-down;
[all …]
Dmsm8998-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 bias-disable; /* NO pull */
9 drive-strength = <16>; /* 16 mA */
16 bias-disable; /* NO pull */
17 drive-strength = <2>; /* 2 mA */
24 bias-pull-up; /* pull up */
25 drive-strength = <10>; /* 10 mA */
32 bias-pull-up; /* pull up */
33 drive-strength = <2>; /* 2 mA */
40 bias-pull-up; /* pull up */
[all …]
Dqcs404-evb-4000.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
7 #include "qcs404-evb.dtsi"
11 compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb",
18 snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
19 snps,reset-active-low;
20 snps,reset-delays-us = <0 10000 10000>;
22 pinctrl-names = "default";
23 pinctrl-0 = <&ethernet_defaults>;
[all …]
Dsdm630.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&intc>;
14 #address-cells = <2>;
15 #size-cells = <2>;
20 xo_board: xo-board {
21 compatible = "fixed-clock";
[all …]
Dmsm8994.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
9 interrupt-parent = <&intc>;
11 #address-cells = <2>;
12 #size-cells = <2>;
17 xo_board: xo-board {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
[all …]
Dmsm8992.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
9 interrupt-parent = <&intc>;
11 #address-cells = <2>;
12 #size-cells = <2>;
17 #address-cells = <2>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a53";
[all …]
Dqcs404-evb.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 stdout-path = "serial0";
20 vph_pwr: vph-pwr-regulator {
21 compatible = "regulator-fixed";
22 regulator-name = "vph_pwr";
23 regulator-always-on;
24 regulator-boot-on;
[all …]
Dsdm845-db845c.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
27 stdout-path = "serial0:115200n8";
30 dc12v: dc12v-regulator {
31 compatible = "regulator-fixed";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dqcom-apq8064-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 sdc4_gpios: sdc4-gpios {
11 sdcc1_pins: sdcc1-pin-active {
14 drive-strengh = <16>;
15 bias-disable;
20 drive-strengh = <10>;
21 bias-pull-up;
26 drive-strengh = <10>;
27 bias-pull-up;
31 sdcc3_pins: sdcc3-pin-active {
[all …]
Dimx28.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx28-pinfunc.h"
9 #address-cells = <1>;
10 #size-cells = <1>;
12 interrupt-parent = <&icoll>;
15 * pre-existing /chosen node to be available to insert the
42 #address-cells = <1>;
43 #size-cells = <0>;
46 compatible = "arm,arm926ej-s";
[all …]
Dqcom-msm8974-lge-nexus5-hammerhead.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974.dtsi"
3 #include "qcom-pm8841.dtsi"
4 #include "qcom-pm8941.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
19 stdout-path = "serial0:115200n8";
25 pm8841-regulators {
27 regulator-min-microvolt = <675000>;
[all …]
Dimx28-cfa10049.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10049 is an expansion board for the CFA-10036 module, thus we
8 * need to include the CFA-10036 DTS.
10 #include "imx28-cfa10036.dts"
13 model = "Crystalfontz CFA-10049 Board";
17 compatible = "i2c-mux-gpio";
18 #address-cells = <1>;
19 #size-cells = <0>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&i2cmux_pins_cfa10049>;
[all …]
Dqcom-mdm9615-wp8548.dtsi7 * This file is dual-licensed: you can use it either under the terms
46 #include "qcom-mdm9615.dtsi"
59 pinctrl-0 = <&reset_out_pins>;
60 pinctrl-names = "default";
66 drive-strength = <8>;
67 bias-disable;
75 drive-strength = <8>;
76 bias-disable;
84 drive-strength = <8>;
85 bias-disable;
[all …]
Dimx23.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include "imx23-pinfunc.h"
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&icoll>;
14 * pre-existing /chosen node to be available to insert the
31 #address-cells = <1>;
32 #size-cells = <0>;
35 compatible = "arm,arm926ej-s";
42 compatible = "simple-bus";
[all …]
Dqcom-msm8974-sony-xperia-castor.dts1 #include "qcom-msm8974pro.dtsi"
2 #include "qcom-pm8841.dtsi"
3 #include "qcom-pm8941.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 compatible = "sony,xperia-castor", "qcom,msm8974";
17 stdout-path = "serial0:115200n8";
20 gpio-keys {
21 compatible = "gpio-keys";
[all …]
/kernel/linux/linux-5.10/arch/mips/boot/dts/img/
Dpistachio.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/pistachio-clk.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/mips-gic.h>
11 #include <dt-bindings/reset/pistachio-resets.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
22 #address-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhikey-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/pinctrl/hisi.h>
11 pinctrl-names = "default";
12 pinctrl-0 = <
21 pinctrl-single,pins = <
27 pinctrl-single,pins = <
42 pinctrl-single,pins = <
52 pinctrl-single,pins = <
63 pinctrl-single,pins = <
73 pinctrl-single,pins = <
[all …]
Dhikey960-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/pinctrl/hisi.h>
12 range: gpio-range {
13 #pinctrl-single,gpio-range-cells = <3>;
17 compatible = "pinctrl-single";
19 #pinctrl-cells = <1>;
20 #gpio-range-cells = <0x3>;
21 pinctrl-single,register-width = <0x20>;
22 pinctrl-single,function-mask = <0x7>;
24 pinctrl-single,gpio-range = <
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-g12-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-mt8183.txt6 - compatible: value should be one of the following.
7 "mediatek,mt8183-pinctrl", compatible with mt8183 pinctrl.
8 - gpio-controller : Marks the device node as a gpio controller.
9 - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
12 - gpio-ranges : gpio valid number range.
13 - reg: physical address base for gpio base registers. There are 10 GPIO
17 - reg-names: gpio base register names. There are 10 gpio base register
20 - interrupt-controller: Marks the device node as an interrupt controller
21 - #interrupt-cells: Should be two.
22 - interrupts : The interrupt outputs to sysirq.
[all …]
Dqcom,ipq8064-pinctrl.txt4 - compatible: "qcom,ipq8064-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
19 Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt8183-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
14 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
26 stdout-path = "serial0:921600n8";
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
34 compatible = "shared-dma-pool";
36 no-map;
46 pinctrl-names = "default";
[all …]
/kernel/linux/linux-5.10/include/linux/platform_data/
Dsi5351.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * enum si5351_pll_src - Si5351 pll clock source
22 * enum si5351_multisynth_src - Si5351 multisynth clock source
34 * enum si5351_clkout_src - Si5351 clock output clock source
51 * enum si5351_drive_strength - Si5351 clock output drive strength
53 * @SI5351_DRIVE_2MA: 2mA clock output drive strength
54 * @SI5351_DRIVE_4MA: 4mA clock output drive strength
55 * @SI5351_DRIVE_6MA: 6mA clock output drive strength
56 * @SI5351_DRIVE_8MA: 8mA clock output drive strength
67 * enum si5351_disable_state - Si5351 clock output disable state
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dnvidia,tegra20-sdhci.txt7 by mmc.txt and the properties used by the sdhci-tegra driver.
10 - compatible : should be one of:
11 - "nvidia,tegra20-sdhci": for Tegra20
12 - "nvidia,tegra30-sdhci": for Tegra30
13 - "nvidia,tegra114-sdhci": for Tegra114
14 - "nvidia,tegra124-sdhci": for Tegra124 and Tegra132
15 - "nvidia,tegra210-sdhci": for Tegra210
16 - "nvidia,tegra186-sdhci": for Tegra186
17 - "nvidia,tegra194-sdhci": for Tegra194
18 - clocks: For Tegra210, Tegra186 and Tegra194 must contain two entries.
[all …]

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