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/kernel/linux/linux-5.10/drivers/greybus/
Dgreybus_trace.h54 * Occurs immediately before calling a host device's message_send()
60 * Occurs after an incoming request message has been received
65 * Occurs after an incoming response message has been received,
71 * Occurs after an operation has been canceled, possibly before the
77 * Occurs when an incoming request is cancelled; if the response has
78 * been queued for sending, this occurs after it is sent.
83 * Occurs in the host driver message_send() function just prior to
127 * Occurs after a new operation is created for an outgoing request
133 * Occurs after a new core operation has been created.
138 * Occurs after a new operation has been created for an incoming
[all …]
/kernel/linux/linux-5.10/drivers/staging/blackbox/
DKconfig10 of chips. When a fault occurs, blackbox will invoke the registered
31 panic occurs. It depends on supporting warm reset and disabling erase
49 panic occurs. It depends on supporting pstore blk. Especially, flash
61 panic occurs. It depends on supporting pstore ram.
69 panic occurs. It depends on reserving partition for blackbox.
78 prompt "Default storage material for fault log when a panic occurs."
82 panic occurs.
/kernel/liteos_m/arch/arm/arm9/gcc/
Dlos_arch_interrupt.h253 /**< Exception occurrence phase: 0 means that an exception occurs in initialization,
254 …* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt…
260 /**< An exception occurs in an interrupt, indicating the interrupt number.
261 …* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initi…
268 … Hardware context at the time an exception to the automatic stack floating-point register occurs */
/kernel/linux/linux-5.10/arch/mips/include/asm/octeon/
Dcvmx-fau.h56 * Tagwait return definition. If a timeout occurs, the error
66 * Tagwait return definition. If a timeout occurs, the error
76 * Tagwait return definition. If a timeout occurs, the error
86 * Tagwait return definition. If a timeout occurs, the error
96 * Asynchronous tagwait return definition. If a timeout occurs,
228 * Returns If a timeout occurs, the error bit will be set. Otherwise
252 * Returns If a timeout occurs, the error bit will be set. Otherwise
276 * Returns If a timeout occurs, the error bit will be set. Otherwise
299 * Returns If a timeout occurs, the error bit will be set. Otherwise
433 * 8 byte aligned. If a timeout occurs, the error bit (63)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/watchdog/
Dmicrochip,pic32-dmt.txt5 whenever an instruction fetch occurs until a count match occurs.
/kernel/liteos_m/arch/arm/cortex-m7/gcc/
Dlos_arch_interrupt.h578 * Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
590 /**< Exception occurrence phase: 0 means that an exception occurs in initialization,
591 …* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt…
597 /**< An exception occurs in an interrupt, indicating the interrupt number.
598 …* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initi…
605 … Hardware context at the time an exception to the automatic stack floating-point register occurs */
/kernel/liteos_m/arch/arm/cortex-m4/iar/
Dlos_arch_interrupt.h578 * Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
590 /**< Exception occurrence phase: 0 means that an exception occurs in initialization,
591 …* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt…
597 /**< An exception occurs in an interrupt, indicating the interrupt number.
598 …* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initi…
605 … Hardware context at the time an exception to the automatic stack floating-point register occurs */
/kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/
Dlos_arch_interrupt.h578 * Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
590 /**< Exception occurrence phase: 0 means that an exception occurs in initialization,
591 …* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt…
597 /**< An exception occurs in an interrupt, indicating the interrupt number.
598 …* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initi…
605 … Hardware context at the time an exception to the automatic stack floating-point register occurs */
/kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/
Dlos_arch_interrupt.h578 * Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
590 /**< Exception occurrence phase: 0 means that an exception occurs in initialization,
591 …* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt…
597 /**< An exception occurs in an interrupt, indicating the interrupt number.
598 …* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initi…
605 … Hardware context at the time an exception to the automatic stack floating-point register occurs */
/kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/
Dlos_arch_interrupt.h578 * Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
590 /**< Exception occurrence phase: 0 means that an exception occurs in initialization,
591 …* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt…
597 /**< An exception occurs in an interrupt, indicating the interrupt number.
598 …* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initi…
605 … Hardware context at the time an exception to the automatic stack floating-point register occurs */
/kernel/liteos_m/arch/arm/cortex-m7/iar/
Dlos_arch_interrupt.h578 * Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
590 /**< Exception occurrence phase: 0 means that an exception occurs in initialization,
591 …* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt…
597 /**< An exception occurs in an interrupt, indicating the interrupt number.
598 …* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initi…
605 … Hardware context at the time an exception to the automatic stack floating-point register occurs */
/kernel/liteos_m/arch/arm/cortex-m55/gcc/NTZ/
Dlos_arch_interrupt.h588 * Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
600 /**< Exception occurrence phase: 0 means that an exception occurs in initialization,
601 …* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt…
607 /**< An exception occurs in an interrupt, indicating the interrupt number.
608 …* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initi…
615 … Hardware context at the time an exception to the automatic stack floating-point register occurs */
/kernel/liteos_m/arch/arm/cortex-m33/gcc/NTZ/
Dlos_arch_interrupt.h578 * Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
590 /**< Exception occurrence phase: 0 means that an exception occurs in initialization,
591 …* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt…
597 /**< An exception occurs in an interrupt, indicating the interrupt number.
598 …* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initi…
605 … Hardware context at the time an exception to the automatic stack floating-point register occurs */
/kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/
Dlos_arch_interrupt.h578 * Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
590 /**< Exception occurrence phase: 0 means that an exception occurs in initialization,
591 …* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt…
597 /**< An exception occurs in an interrupt, indicating the interrupt number.
598 …* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initi…
605 … Hardware context at the time an exception to the automatic stack floating-point register occurs */
/kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/
Dlos_arch_interrupt.h578 * Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
590 /**< Exception occurrence phase: 0 means that an exception occurs in initialization,
591 …* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt…
597 /**< An exception occurs in an interrupt, indicating the interrupt number.
598 …* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initi…
605 … Hardware context at the time an exception to the automatic stack floating-point register occurs */
/kernel/liteos_m/arch/arm/cortex-m4/gcc/
Dlos_arch_interrupt.h578 * Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
590 /**< Exception occurrence phase: 0 means that an exception occurs in initialization,
591 …* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt…
597 /**< An exception occurs in an interrupt, indicating the interrupt number.
598 …* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initi…
605 … Hardware context at the time an exception to the automatic stack floating-point register occurs */
/kernel/liteos_m/arch/arm/cortex-m3/keil/
Dlos_arch_interrupt.h581 * Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
593 /**< Exception occurrence phase: 0 means that an exception occurs in initialization,
594 …* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt…
600 /**< An exception occurs in an interrupt, indicating the interrupt number.
601 …* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initi…
608 … Hardware context at the time an exception to the automatic stack floating-point register occurs */
/kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/
Dlos_arch_interrupt.h578 * Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
590 /**< Exception occurrence phase: 0 means that an exception occurs in initialization,
591 …* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt…
597 /**< An exception occurs in an interrupt, indicating the interrupt number.
598 …* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initi…
605 … Hardware context at the time an exception to the automatic stack floating-point register occurs */
/kernel/linux/linux-5.10/include/trace/events/
Dcontext_tracking.h31 * This event occurs when the kernel resumes to userspace after
45 * This event occurs when userspace enters the kernel through
/kernel/linux/linux-5.10/include/linux/
Diopoll.h18 * met or a timeout occurs
62 * met or a timeout occurs
103 * readx_poll_timeout - Periodically poll an address until a condition is met or a timeout occurs
124 …adx_poll_timeout_atomic - Periodically poll an address until a condition is met or a timeout occurs
/kernel/liteos_a/arch/arm/include/
Dlos_exc.h52 * Description: register information stored when an exception occurs on an LPC2458 platform.
96 * Description: exception information stored when an exception occurs on an LPC2458 platform.
100 UINT16 phase; /**< Phase in which an exception occurs */
104 ExcContext *context; /**< Hardware context when an exception occurs */
/kernel/linux/linux-5.10/include/media/
Dcec-notifier.h26 * @port_name: the connector name from which the event occurs. May be NULL
28 * @conn_info: the connector info from which the event occurs (may be NULL)
53 * @port_name: the connector name from which the event occurs. May be NULL
/kernel/linux/linux-5.10/tools/arch/sparc/include/asm/
Dbarrier_64.h8 * #51. Essentially, if a memory barrier occurs soon after a mispredicted
9 * branch, the chip can stop executing instructions until a trap occurs.
/kernel/linux/linux-5.10/arch/sparc/include/asm/
Dbarrier_64.h6 * #51. Essentially, if a memory barrier occurs soon after a mispredicted
7 * branch, the chip can stop executing instructions until a trap occurs.
/kernel/linux/linux-5.10/Documentation/virt/
Dguest-halt-polling.rst43 wakeup event occurs after the global guest_halt_poll_ns.
50 when event occurs after per-cpu guest_halt_poll_ns

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