| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/frequency/ |
| D | adf4350.txt | 4 - compatible: Should be one of
7 - reg: SPI chip select numbert for the device
8 - spi-max-frequency: Max SPI frequency to use (< 20000000)
9 - clocks: From common clock binding. Clock is phandle to clock for
13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number,
15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS).
16 - adi,power-up-frequency: If set in Hz the PLL tunes to
18 - adi,reference-div-factor: If set the driver skips dynamic calculation
20 - adi,reference-doubler-enable: Enables reference doubler.
21 - adi,reference-div2-enable: Enables reference divider.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | pincfg-node.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
33 bias-pull-up:
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| D | sprd,pinctrl.txt | 9 driving level": One pin can output 3.0v or 1.8v, depending on the
11 slect 3.0v, then the pin can output 3.0v. "system control" is used
16 of them, so we can not make every Spreadtrum-special configuration
35 - input-enable
36 - input-disable
37 - output-high
38 - output-low
39 - bias-pull-up
40 - bias-pull-down
46 and set the pin sleep related configuration as "input-enable", which
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| D | microchip,pic32-pinctrl.txt | 3 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
4 ../interrupt-controller/interrupts.txt for generic information regarding
12 - compatible: "microchip,pic32mada-pinctrl"
13 - reg: Address range of the pinctrl registers.
14 - clocks: Clock specifier (see clock bindings for details)
16 Required properties for pin configuration sub-nodes:
17 - pins: List of pins to which the configuration applies.
19 Optional properties for pin configuration sub-nodes:
20 ----------------------------------------------------
21 - function: Mux function for the specified pins.
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| D | sprd,sc9860-pinctrl.txt | 7 - compatible: Must be "sprd,sc9860-pinctrl".
8 - reg: The register address of pin controller device.
9 - pins : An array of strings, each string containing the name of a pin.
12 - function: A string containing the name of the function, values must be
14 - drive-strength: Drive strength in mA. Supported values: 2, 4, 6, 8, 10,
16 - input-schmitt-disable: Enable schmitt-trigger mode.
17 - input-schmitt-enable: Disable schmitt-trigger mode.
18 - bias-disable: Disable pin bias.
19 - bias-pull-down: Pull down on pin.
20 - bias-pull-up: Pull up on pin. Supported values: 20000 for pull-up resistor
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| /kernel/linux/linux-5.10/drivers/hwtracing/intel_th/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
7 produce, switch and output trace data from multiple hardware and
8 software sources over several types of trace output ports encoded
16 Say Y here to enable Intel(R) Trace Hub controller support.
25 support glue layer for PCI-based Intel TH.
27 Say Y here to enable PCI Intel TH support.
34 support glue layer for ACPI-based Intel TH. This typically implies
39 Say Y here to enable ACPI Intel TH support.
46 and output devices. This driver is required for other
49 Say Y here to enable GTH subdevice of Intel(R) Trace Hub.
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| D | intel_th.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2014-2015 Intel Corporation.
17 /* Output ports (MSC, PTI) */
26 * struct intel_th_output - descriptor INTEL_TH_OUTPUT type devices
27 * @port: output port number, assigned by the switch
29 * @scratchpad: scratchpad bits to flag when this output is enabled
30 * @multiblock: true for multiblock output configuration
31 * @active: true when this output is enabled
34 * Output port descriptor, used by switch driver to tell which output
35 * port this output device corresponds to. Filled in at output device's
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| /kernel/linux/linux-5.10/drivers/pinctrl/ |
| D | pinctrl-at91.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Parallel I/O Controller (PIO) - System peripherals registers.
12 #define PIO_PER 0x00 /* Enable Register */
15 #define PIO_OER 0x10 /* Output Enable Register */
16 #define PIO_ODR 0x14 /* Output Disable Register */
17 #define PIO_OSR 0x18 /* Output Status Register */
18 #define PIO_IFER 0x20 /* Glitch Input Filter Enable */
21 #define PIO_SODR 0x30 /* Set Output Data Register */
22 #define PIO_CODR 0x34 /* Clear Output Data Register */
23 #define PIO_ODSR 0x38 /* Output Data Status Register */
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| /kernel/linux/linux-5.10/drivers/net/wireless/intel/ipw2x00/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
34 rather than built-in (Y). This driver requires firmware at device
35 initialization time, and when built-in this typically happens
42 bool "Enable promiscuous mode"
51 bool "Enable full debugging output in IPW2100 module."
54 This option will enable debug tracing output for the IPW2100.
57 control which debug output is sent to the kernel log by setting the
96 rather than built-in (Y). This driver requires firmware at device
97 initialization time, and when built-in this typically happens
104 bool "Enable promiscuous mode"
[all …]
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| /kernel/linux/linux-5.10/Documentation/fb/ |
| D | viafb.rst | 6 --------
15 ---------------
34 ----------------------
47 - 640x480 (default)
48 - 720x480
49 - 800x600
50 - 1024x768
53 - 8, 16, 32 (default:32)
56 - 60, 75, 85, 100, 120 (default:60)
59 - 0 : expansion (default)
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| /kernel/linux/linux-5.10/sound/pci/emu10k1/ |
| D | p16v.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
8 * Output fixed at S32_LE, 2 channel to hw:0,0
15 * Use 2 channel output streams instead of 8 channel.
16 * (8 channel output streams might be good for ASIO type output)
17 * Corrected speaker output, so Front -> Front etc.
36 * Merging with snd-emu10k1 driver.
45 * Some stability problems when unloading the snd-p16v kernel module.
46 * --
53 * --
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| /kernel/linux/linux-5.10/drivers/media/platform/qcom/camss/ |
| D | camss-vfe-4-7.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * camss-vfe-4-7.c
5 * Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module v4.7
7 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8 * Copyright (C) 2015-2018 Linaro Ltd.
15 #include "camss-vfe.h"
244 u32 hw_version = readl_relaxed(vfe->base + VFE_0_HW_VERSION); in vfe_hw_version_read()
261 u32 bits = readl_relaxed(vfe->base + reg); in vfe_reg_clr()
263 writel_relaxed(bits & ~clr_bits, vfe->base + reg); in vfe_reg_clr()
268 u32 bits = readl_relaxed(vfe->base + reg); in vfe_reg_set()
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| D | camss-vfe-4-1.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * camss-vfe-4-1.c
5 * Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module v4.1
7 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8 * Copyright (C) 2015-2018 Linaro Ltd.
15 #include "camss-vfe.h"
213 u32 hw_version = readl_relaxed(vfe->base + VFE_0_HW_VERSION); in vfe_hw_version_read()
228 u32 bits = readl_relaxed(vfe->base + reg); in vfe_reg_clr()
230 writel_relaxed(bits & ~clr_bits, vfe->base + reg); in vfe_reg_clr()
235 u32 bits = readl_relaxed(vfe->base + reg); in vfe_reg_set()
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| /kernel/linux/linux-5.10/drivers/regulator/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
15 output in order to save power and prolong battery life. This applies
16 to both voltage regulators (where voltage output is controllable) and
17 current sinks (where current output is controllable).
31 Say yes here to enable debugging support.
38 managed regulators and simple non-configurable regulators.
65 They provide two I2C-controlled DC/DC step-down converters with
66 sleep mode and separate enable pins.
73 It delivers digitally programmable output,
85 tristate "Active-semi act8865 voltage regulator"
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| /kernel/linux/linux-5.10/include/sound/ |
| D | ak4114.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
13 #define AK4114_REG_IO0 0x02 /* input/output control */
14 #define AK4114_REG_IO1 0x03 /* input/output control */
33 #define AK4114_REG_QSUB_ADDR 0x16 /* Q-subcode address + control */
34 #define AK4114_REG_QSUB_TRACK 0x17 /* Q-subcode track */
35 #define AK4114_REG_QSUB_INDEX 0x18 /* Q-subcode index */
36 #define AK4114_REG_QSUB_MINUTE 0x19 /* Q-subcode minute */
37 #define AK4114_REG_QSUB_SECOND 0x1a /* Q-subcode second */
38 #define AK4114_REG_QSUB_FRAME 0x1b /* Q-subcode frame */
39 #define AK4114_REG_QSUB_ZERO 0x1c /* Q-subcode zero */
[all …]
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| D | ak4113.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 /* input/output control */
18 /* input/output control */
50 /* Q-subcode address + control */
52 /* Q-subcode track */
54 /* Q-subcode index */
56 /* Q-subcode minute */
58 /* Q-subcode second */
60 /* Q-subcode frame */
62 /* Q-subcode zero */
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| D | cs4231-regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
27 #define CS4231_LEFT_OUTPUT 0x06 /* left output control register */
28 #define CS4231_RIGHT_OUTPUT 0x07 /* right output control register */
29 #define CS4231_PLAYBK_FORMAT 0x08 /* clock and data format - playback - bits 7-0 MCE */
30 #define CS4231_IFACE_CTRL 0x09 /* interface control - bits 7-2 MCE */
37 #define CS4231_ALT_FEATURE_1 0x10 /* alternate #1 feature enable */
39 #define CS4231_ALT_FEATURE_2 0x11 /* alternate #2 feature enable */
51 #define CS4231_LINE_LEFT_OUTPUT 0x19 /* left line output control register (InterWave only) */
52 #define CS4231_VERSION 0x19 /* CS4231(A) - version values */
53 #define CS4231_MONO_CTRL 0x1a /* mono input/output control */
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | xgene.txt | 1 Device Tree Clock bindings for APM X-Gene
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
8 - compatible : shall be one of the following:
9 "apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock
10 "apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock
11 "apm,xgene-pmd-clock" - for a X-Gene PMD clock
12 "apm,xgene-device-clock" - for a X-Gene device clock
13 "apm,xgene-socpll-v2-clock" - for a X-Gene SoC PLL v2 clock
14 "apm,xgene-pcppll-v2-clock" - for a X-Gene PCP PLL v2 clock
17 - reg : shall be the physical PLL register address for the pll clock.
[all …]
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| /kernel/linux/linux-5.10/arch/mips/include/uapi/asm/ |
| D | termbits.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
27 tcflag_t c_oflag; /* output mode flags */
36 tcflag_t c_oflag; /* output mode flags */
42 speed_t c_ospeed; /* output speed */
47 tcflag_t c_oflag; /* output mode flags */
53 speed_t c_ospeed; /* output speed */
60 #define VKILL 3 /* Kill-line character [ICANON]. */
62 #define VTIME 5 /* Time-out value (tenths of a second) [!ICANON]. */
66 #define VSTART 8 /* Start (X-ON) character [IXON, IXOFF]. */
67 #define VSTOP 9 /* Stop (X-OFF) character [IXON, IXOFF]. */
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| /kernel/linux/linux-5.10/drivers/gpu/drm/meson/ |
| D | meson_dw_hdmi.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 * Bit 15-10: RW Reserved. Default 1 starting from G12A
33 * Bit 31 RW free_clk_en: 0=Enable clock gating for power saving; 1= Disable
39 * Bit 7 RW hdcp22_skpclk_en: starting from G12A, 1=enable; 0=disable
40 * Bit 6 RW hdcp22_esmclk_en: starting from G12A, 1=enable; 0=disable
41 * Bit 5 RW hdcp22_tmdsclk_en: starting from G12A, 1=enable; 0=disable
42 * Bit 4 RW cec_clk_en: 1=enable cec_clk; 0=disable. Default 0. Reserved for G12A
43 * Bit 3 RW i2s_clk_en: 1=enable i2s_clk; 0=disable. Default 0.
44 * Bit 2 RW spdif_clk_en: 1=enable spdif_clk; 0=disable. Default 0.
45 * Bit 1 RW tmds_clk_en: 1=enable tmds_clk; 0=disable. Default 0.
[all …]
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| /kernel/linux/linux-5.10/drivers/media/dvb-frontends/ |
| D | m88ds3103.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
19 * enum m88ds3103_ts_mode - TS connection mode
20 * @M88DS3103_TS_SERIAL: TS output pin D0, normal
21 * @M88DS3103_TS_SERIAL_D7: TS output pin D7
34 * @M88DS3103_CLOCK_OUT_DISABLED: Clock output is disabled
35 * @M88DS3103_CLOCK_OUT_ENABLED: Clock output is enabled with crystal
37 * @M88DS3103_CLOCK_OUT_ENABLED_DIV2: Clock output is enabled with half
47 * struct m88ds3103_platform_data - Platform data for the m88ds3103 driver
52 * @ts_clk_pol: TS clk polarity. 1-active at falling edge; 0-active at rising
57 * @clk_out: Clock output.
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| /kernel/linux/linux-5.10/drivers/video/backlight/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
14 This framework adds support for low-level control of LCD.
15 Some framebuffer devices connect to platform-specific LCD modules
16 in order to have a platform-specific way to control the flat panel
54 output.
90 This driver provides a platform-device registered LCD power
94 tristate "Sharp SL-6000 LCD Driver"
97 If you have an Sharp SL-6000 Zaurus say Y to enable a driver
106 say Y to enable LCD control driver.
113 If you have an AMS369FG06 AMOLED Panel, say Y to enable its
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| /kernel/linux/linux-5.10/Documentation/ABI/testing/ |
| D | sysfs-bus-iio-timer-stm32 | 8 - "reset"
10 used as trigger output (TRGO).
11 - "enable"
12 The Counter Enable signal CNT_EN is used
13 as trigger output.
14 - "update"
15 The update event is selected as trigger output.
18 - "compare_pulse"
19 The trigger output send a positive pulse
21 - "OC1REF"
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| /kernel/linux/linux-5.10/drivers/media/platform/sti/delta/ |
| D | delta-mjpeg-fw.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
49 /* enable decimated (for display) reconstruction */
51 /* enable main (for display) reconstruction */
53 /* enable both main & decimated (for display) reconstruction */
55 /* enable only reference output(ex. for trick modes) */
58 * enable reference output with decimated
63 * enable reference output with main
68 * enable reference output with main & decimated
78 /* Advanced H/2 resize using improved 8-tap filters */
80 /* Advanced H/4 resize using improved 8-tap filters */
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| /kernel/linux/linux-5.10/drivers/media/platform/omap3isp/ |
| D | ispcsi2.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * TI OMAP3 ISP - CSI2 module
14 #include <media/v4l2-common.h>
15 #include <linux/v4l2-mediabus.h>
23 * csi2_if_enable - Enable CSI2 Receiver interface.
24 * @enable: enable flag
28 struct isp_csi2_device *csi2, u8 enable) in csi2_if_enable() argument
30 struct isp_csi2_ctrl_cfg *currctrl = &csi2->ctrl; in csi2_if_enable()
32 isp_reg_clr_set(isp, csi2->regs1, ISPCSI2_CTRL, ISPCSI2_CTRL_IF_EN, in csi2_if_enable()
33 enable ? ISPCSI2_CTRL_IF_EN : 0); in csi2_if_enable()
[all …]
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