/kernel/linux/linux-5.10/arch/arm/boot/dts/ |
D | stm32mp151.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp1-clks.h> 8 #include <dt-bindings/reset/stm32mp1-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
|
D | stm32f429.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 22 * MA 02110-1301 USA 48 #include "armv7-m.dtsi" 49 #include <dt-bindings/clock/stm32fx-clock.h> 50 #include <dt-bindings/mfd/stm32f4-rcc.h> 53 #address-cells = <1>; 54 #size-cells = <1>; 57 clk_hse: clk-hse { 58 #clock-cells = <0>; [all …]
|
D | stm32h743.dtsi | 2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "armv7-m.dtsi" 44 #include <dt-bindings/clock/stm32h7-clks.h> 45 #include <dt-bindings/mfd/stm32h7-rcc.h> 46 #include <dt-bindings/interrupt-controller/irq.h> 49 #address-cells = <1>; 50 #size-cells = <1>; 53 clk_hse: clk-hse { 54 #clock-cells = <0>; [all …]
|
D | stm32f746.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "armv7-m.dtsi" 44 #include <dt-bindings/clock/stm32fx-clock.h> 45 #include <dt-bindings/mfd/stm32f7-rcc.h> 48 #address-cells = <1>; 49 #size-cells = <1>; 52 clk_hse: clk-hse { 53 #clock-cells = <0>; 54 compatible = "fixed-clock"; [all …]
|
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
D | st,stm32-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/st,stm32-dma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 DMA Controller bindings 10 The STM32 DMA is a general-purpose direct memory access controller capable of 11 supporting 8 independent DMA channels. Each channel can have up to 8 requests. 12 DMA clients connected to the STM32 DMA controller must use the format 13 described in the dma.txt file, using a four-cell specifier for each 14 channel: a phandle to the DMA controller plus the following four integer cells: [all …]
|
D | st,stm32-mdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/st,stm32-mdma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 MDMA Controller bindings 10 The STM32 MDMA is a general-purpose direct memory access controller capable of 11 supporting 64 independent DMA channels with 256 HW requests. 12 DMA clients connected to the STM32 MDMA controller must use the format 13 described in the dma.txt file, using a five-cell specifier for each channel: 21 3. A 32bit mask specifying the DMA channel configuration [all …]
|
D | st,stm32-dmamux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/st,stm32-dmamux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 DMA MUX (DMA request router) bindings 10 - Amelie Delaunay <amelie.delaunay@st.com> 13 - $ref: "dma-router.yaml#" 16 "#dma-cells": 20 const: st,stm32h7-dmamux 32 - compatible [all …]
|
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
D | st,stm32-spi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/st,stm32-spi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 SPI Controller bindings 10 The STM32 SPI controller is used to communicate with external devices using 11 the Serial Peripheral Interface. It supports full-duplex, half-duplex and 13 from 4 to 32-bit data size. 16 - Erwan Leray <erwan.leray@st.com> 17 - Fabrice Gasnier <fabrice.gasnier@st.com> [all …]
|
D | st,stm32-qspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/st,stm32-qspi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Quad Serial Peripheral Interface (QSPI) bindings 10 - Christophe Kerello <christophe.kerello@st.com> 11 - Patrice Chotard <patrice.chotard@st.com> 14 - $ref: "spi-controller.yaml#" 18 const: st,stm32f469-qspi 22 - description: registers [all …]
|
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
D | st,stm32-sai.txt | 1 STMicroelectronics STM32 Serial Audio Interface (SAI). 4 as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97. 5 The SAI contains two independent audio sub-blocks. Each sub-block has 9 - compatible: Should be "st,stm32f4-sai" or "st,stm32h7-sai" 10 - reg: Base address and size of SAI common register set. 11 - clocks: Must contain phandle and clock specifier pairs for each entry 12 in clock-names. 13 - clock-names: Must contain "pclk" "x8k" and "x11k" 15 Mandatory for "st,stm32h7-sai" compatible. 16 Not used for "st,stm32f4-sai" compatible. [all …]
|
D | st,stm32-spdifrx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/st,stm32-spdifrx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 S/PDIF receiver (SPDIFRX) 10 - Olivier Moysan <olivier.moysan@st.com> 14 IEC-60958 and IEC-61937. 19 - st,stm32h7-spdifrx 21 "#sound-dai-cells": 30 clock-names: [all …]
|
D | st,stm32-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/st,stm32-i2s.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 SPI/I2S Controller 10 - Olivier Moysan <olivier.moysan@st.com> 19 - st,stm32h7-i2s 21 "#sound-dai-cells": 29 - description: clock feeding the peripheral bus interface. 30 - description: clock feeding the internal clock generator. [all …]
|
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
D | st,stm32-dfsdm-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 DFSDM ADC device driver 10 - Fabrice Gasnier <fabrice.gasnier@st.com> 11 - Olivier Moysan <olivier.moysan@st.com> 14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to 15 interface external sigma delta modulators to STM32 micro controllers. 17 - Sigma delta modulators (motor control, metering...) [all …]
|
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
D | st,stm32-timers.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Timers bindings 11 - advanced-control timers consist of a 16-bit auto-reload counter driven 14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter 16 - basic timers consist of a 16-bit auto-reload counter driven by a 20 - Benjamin Gaignard <benjamin.gaignard@st.com> 21 - Fabrice Gasnier <fabrice.gasnier@st.com> [all …]
|
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/ |
D | st,stm32-dcmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Digital Camera Memory Interface (DCMI) binding 10 - Hugues Fruchet <hugues.fruchet@st.com> 14 const: st,stm32-dcmi 25 clock-names: 27 - const: mclk 32 dma-names: [all …]
|
/kernel/linux/linux-5.10/drivers/mfd/ |
D | stm32-timers.c | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <linux/mfd/stm32-timers.h> 15 /* DIER register DMA enable bits */ 28 struct stm32_timers_dma *dma = p; in stm32_timers_dma_done() local 32 status = dmaengine_tx_status(dma->chan, dma->chan->cookie, &state); in stm32_timers_dma_done() 34 complete(&dma->completion); in stm32_timers_dma_done() 38 * stm32_timers_dma_burst_read - Read from timers registers using DMA. 40 * Read from STM32 timers registers using DMA on a single event. 42 * @buf: DMA'able destination buffer 44 * @reg: registers start offset for DMA to read from (like CCRx for capture) [all …]
|
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/serial/ |
D | st,stm32-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 - Erwan Le Ray <erwan.leray@st.com> 10 title: STMicroelectronics STM32 USART bindings 13 - $ref: rs485.yaml 18 - st,stm32-uart 19 - st,stm32f7-uart 20 - st,stm32h7-uart [all …]
|
/kernel/linux/linux-5.10/drivers/dma/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # DMA engine configuration 7 bool "DMA Engine support" 10 DMA engines can do asynchronous data transfers without 14 DMA Device drivers supported by the configured arch, it may 18 bool "DMA Engine debugging" 22 say N here. This enables DMA engine core and driver debugging. 25 bool "DMA Engine verbose debugging" 30 the DMA engine core and drivers. 35 comment "DMA Devices" [all …]
|
D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 subdir-ccflags-$(CONFIG_DMADEVICES_DEBUG) := -DDEBUG 4 subdir-ccflags-$(CONFIG_DMADEVICES_VDEBUG) += -DVERBOSE_DEBUG 7 obj-$(CONFIG_DMA_ENGINE) += dmaengine.o 8 obj-$(CONFIG_DMA_VIRTUAL_CHANNELS) += virt-dma.o 9 obj-$(CONFIG_DMA_ACPI) += acpi-dma.o 10 obj-$(CONFIG_DMA_OF) += of-dma.o 13 obj-$(CONFIG_DMATEST) += dmatest.o 16 obj-$(CONFIG_ALTERA_MSGDMA) += altera-msgdma.o 17 obj-$(CONFIG_AMBA_PL08X) += amba-pl08x.o [all …]
|
D | stm32-dmamux.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Pierre-Yves Mordret <pierre-yves.mordret@st.com> 8 * DMA Router driver for STM32 DMA MUX 10 * Based on TI DMA Crossbar driver 39 u32 dma_requests; /* Number of DMA requests connected to DMAMUX */ 40 u32 dmamux_requests; /* Number of DMA requests routed toward DMAs */ 42 unsigned long *dma_inuse; /* Used DMA channel */ 46 u32 dma_reqs[]; /* Number of DMA Request per DMA masters. 47 * [0] holds number of DMA Masters. 68 /* Clear dma request */ in stm32_dmamux_free() [all …]
|
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/stm32/ |
D | st,mlahb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: "http://devicetree.org/schemas/arm/stm32/st,mlahb.yaml#" 5 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 title: STMicroelectronics STM32 ML-AHB interconnect bindings 10 - Fabien Dessenne <fabien.dessenne@st.com> 11 - Arnaud Pouliquen <arnaud.pouliquen@st.com> 14 These bindings describe the STM32 SoCs ML-AHB interconnect bus which connects 15 a Cortex-M subsystem with dedicated memories. The MCU SRAM and RETRAM memory 17 using different buses (see [2]): balancing the Cortex-M firmware accesses [all …]
|
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/crypto/ |
D | st,stm32-hash.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 HASH bindings 10 - Lionel Debieve <lionel.debieve@st.com> 15 - st,stm32f456-hash 16 - st,stm32f756-hash 33 dma-names: 35 - const: in [all …]
|
/kernel/linux/linux-5.10/drivers/mmc/host/ |
D | mmci.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * linux/drivers/mmc/host/mmci.h - ARM PrimeCell MMCI PL180/1 driver 24 * The STM32 sdmmc does not have PWR_UP/OD/ROD 58 /* Modified on STM32 sdmmc */ 93 /* Command register in STM32 sdmmc versions */ 131 /* Control register extensions in STM32 versions */ 165 /* Extended status bits for the STM32 variants */ 186 /* Extended clear bits for the STM32 variants */ 217 /* Extended status bits for the STM32 variants */ 224 /* STM32 sdmmc registers for IDMA (Internal DMA) */ [all …]
|
/kernel/linux/linux-5.10/drivers/i2c/busses/ |
D | i2c-stm32.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * i2c-stm32.c 9 #include "i2c-stm32.h" 11 /* Functions for DMA support */ 17 struct stm32_i2c_dma *dma; in stm32_i2c_dma_request() local 21 dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL); in stm32_i2c_dma_request() 22 if (!dma) in stm32_i2c_dma_request() 23 return ERR_PTR(-ENOMEM); in stm32_i2c_dma_request() 25 /* Request and configure I2C TX dma channel */ in stm32_i2c_dma_request() 26 dma->chan_tx = dma_request_chan(dev, "tx"); in stm32_i2c_dma_request() [all …]
|
/kernel/linux/linux-5.10/drivers/iio/adc/ |
D | stm32-adc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * This file is part of STM32 ADC driver 5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 11 #include <linux/dma-mapping.h> 15 #include <linux/iio/timer/stm32-lptim-trigger.h> 16 #include <linux/iio/timer/stm32-timer-trigger.h> 29 #include "stm32-adc-core.h" 55 /* extsel - trigger mux selection value */ 81 * struct stm32_adc_trig_info - ADC trigger info 91 * struct stm32_adc_calib - optional adc calibration data [all …]
|