| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | pistachio-clock.txt | 5 general control, and top general control) which are instantiated individually
6 from the device-tree.
9 ----------------
12 defined with the following clock-output-names:
13 - "xtal": External 52Mhz oscillator (required)
14 - "audio_clk_in": Alternate audio reference clock (optional)
15 - "enet_clk_in": Alternate ethernet PHY clock (optional)
18 ----------------------
21 co-processor), audio, and several peripherals.
24 - compatible: Must be "img,pistachio-clk".
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| /kernel/linux/linux-5.10/Documentation/driver-api/media/drivers/ |
| D | pvrusb2.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 ----------
13 Its history started with the reverse-engineering effort by Björn
29 1. Low level wire-protocol implementation with the device.
34 3. High level hardware driver implementation which coordinates all
38 tear-down, arbitration, and interaction with high level
42 5. High level interfaces which glue the driver to various published
45 The most important shearing layer is between the top 2 layers. A
47 conceivable API can be laid on top of the core driver. (Yes, the
54 right now the V4L high level interface is the most complete, the
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| /kernel/linux/linux-5.10/arch/x86/boot/compressed/ |
| D | pgtable_64.c | 54 * Only look for values in the legacy ROM for non-EFI system. in find_trampoline_placement()
56 signature = (char *)&boot_params->efi_info.efi_loader_signature; in find_trampoline_placement()
72 for (i = boot_params->e820_entries - 1; i >= 0; i--) { in find_trampoline_placement()
75 entry = &boot_params->e820_table[i]; in find_trampoline_placement()
78 if (bios_start <= entry->addr) in find_trampoline_placement()
81 /* Skip non-RAM entries. */ in find_trampoline_placement()
82 if (entry->type != E820_TYPE_RAM) in find_trampoline_placement()
86 if (bios_start > entry->addr + entry->size) in find_trampoline_placement()
87 new = entry->addr + entry->size; in find_trampoline_placement()
89 /* Keep bios_start page-aligned. */ in find_trampoline_placement()
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| /kernel/linux/linux-5.10/net/core/ |
| D | gen_stats.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
26 if (nla_put_64bit(d->skb, type, size, buf, padattr)) in gnet_stats_copy()
31 if (d->lock) in gnet_stats_copy()
32 spin_unlock_bh(d->lock); in gnet_stats_copy()
33 kfree(d->xstats); in gnet_stats_copy()
34 d->xstats = NULL; in gnet_stats_copy()
35 d->xstats_len = 0; in gnet_stats_copy()
36 return -1; in gnet_stats_copy()
40 * gnet_stats_start_copy_compat - start dumping procedure in compatibility mode
42 * @type: TLV type for top level statistic TLV
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| /kernel/linux/linux-5.10/drivers/md/persistent-data/ |
| D | dm-btree.c | 7 #include "dm-btree-internal.h"
8 #include "dm-space-map.h"
9 #include "dm-transaction-manager.h"
12 #include <linux/device-mapper.h>
16 /*----------------------------------------------------------------
18 *--------------------------------------------------------------*/
33 (nr_elts - index) * elt_size); in array_insert()
38 /*----------------------------------------------------------------*/
43 int lo = -1, hi = le32_to_cpu(n->header.nr_entries); in bsearch()
45 while (hi - lo > 1) { in bsearch()
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| /kernel/linux/linux-5.10/arch/arm64/include/asm/ |
| D | stage2_pgtable.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2016 - ARM Ltd
14 * PGDIR_SHIFT determines the size a top-level page table entry can map
18 #define pt_levels_pgdir_shift(lvls) ARM64_HW_PGTABLE_LEVEL_SHIFT(4 - (lvls))
22 * level and we use the feature whenever possible, which means we resolve 4
23 * additional bits of address at the entry level.
27 * the same logic used for the (non-collapsable) stage1 page tables but for
28 * (IPA_SHIFT - 4).
30 #define stage2_pgtable_levels(ipa) ARM64_HW_PGTABLE_LEVELS((ipa) - 4)
31 #define kvm_stage2_levels(kvm) VTCR_EL2_LVLS(kvm->arch.vtcr)
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/icelake/ |
| D | other.json | 4 …-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. Th…
14 …s running with power-delivery for baseline license level 0. This includes non-AVX codes, SSE, AVX…
21 …s where the core was running in a manner where Turbo may be clipped to the Non-AVX turbo schedule."
25 … running with power-delivery for license level 1. This includes high current AVX 256-bit instruct…
36 … running with power-delivery for license level 2 (introduced in Skylake Server microarchtecture). …
91 …-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. Th…
|
| /kernel/linux/linux-5.10/arch/powerpc/mm/nohash/ |
| D | 8xx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * -- christophe
14 #include <asm/code-patching.h>
34 return p + va - VIRT_IMMR_BASE; in v_block_mapped()
51 return VIRT_IMMR_BASE + pa - p; in p_block_mapped()
80 return -EINVAL; in __early_map_kernel_hugepage()
84 return -EINVAL; in __early_map_kernel_hugepage()
98 return -ENOMEM; in __early_map_kernel_hugepage()
102 return -EINVAL; in __early_map_kernel_hugepage()
110 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
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| /kernel/linux/linux-5.10/block/ |
| D | blk-settings.c | 1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/dma-mapping.h>
18 #include "blk-wbt.h"
27 q->rq_timeout = timeout; in blk_queue_rq_timeout()
32 * blk_set_default_limits - reset limits to default values
40 lim->max_segments = BLK_MAX_SEGMENTS; in blk_set_default_limits()
41 lim->max_discard_segments = 1; in blk_set_default_limits()
42 lim->max_integrity_segments = 0; in blk_set_default_limits()
43 lim->seg_boundary_mask = BLK_SEG_BOUNDARY_MASK; in blk_set_default_limits()
44 lim->virt_boundary_mask = 0; in blk_set_default_limits()
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| /kernel/linux/linux-5.10/arch/x86/events/intel/ |
| D | ds.c | 1 // SPDX-License-Identifier: GPL-2.0
57 #define LEVEL(x) P(LVLNUM, x) macro
63 P(OP, LOAD) | P(LVL, MISS) | LEVEL(L3) | P(SNOOP, NA),/* 0x00:ukn L3 */
64 OP_LH | P(LVL, L1) | LEVEL(L1) | P(SNOOP, NONE), /* 0x01: L1 local */
65 OP_LH | P(LVL, LFB) | LEVEL(LFB) | P(SNOOP, NONE), /* 0x02: LFB hit */
66 OP_LH | P(LVL, L2) | LEVEL(L2) | P(SNOOP, NONE), /* 0x03: L2 hit */
67 OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, NONE), /* 0x04: L3 hit */
68 OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, MISS), /* 0x05: L3 hit, snoop miss */
69 OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, HIT), /* 0x06: L3 hit, snoop hit */
70 OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, HITM), /* 0x07: L3 hit, snoop hitm */
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| /kernel/linux/linux-5.10/Documentation/sphinx/ |
| D | parallel-wrapper.sh | 2 # SPDX-License-Identifier: GPL-2.0+
5 # environment (as exported by scripts/jobserver-exec), or fall back to
6 # the "auto" parallelism when "-jN" is not specified at the top-level
13 if [ -z "$parallel" ] ; then
14 # If no parallelism is specified at the top-level make, then
15 # fall back to the expected "-jauto" mode that the "htmldocs"
17 auto=$(perl -e 'open IN,"'"$sphinx"' --version 2>&1 |";
24 if [ -n "$auto" ] ; then
28 # Only if some parallelism has been determined do we add the -jN option.
29 if [ -n "$parallel" ] ; then
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|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | brcm,bcm2835-armctrl-ic.txt | 1 BCM2835 Top-Level ("ARMCTRL") Interrupt Controller
3 The BCM2835 contains a custom top-level interrupt controller, which supports
4 72 interrupt sources using a 2-level register scheme. The interrupt
9 interrupts, but the per-CPU interrupt controller is the root, and an
14 - compatible : should be "brcm,bcm2835-armctrl-ic" or
15 "brcm,bcm2836-armctrl-ic"
16 - reg : Specifies base physical address and size of the registers.
17 - interrupt-controller : Identifies the node as an interrupt controller
18 - #interrupt-cells : Specifies the number of cells needed to encode an
28 Additional required properties for brcm,bcm2836-armctrl-ic:
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|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | img,pistachio-internal-dac.txt | 5 - compatible: "img,pistachio-internal-dac"
7 - img,cr-top : Must contain a phandle to the top level control syscon
10 - VDD-supply : Digital power supply regulator (+1.8V or +3.3V)
14 internal_dac: internal-dac {
15 compatible = "img,pistachio-internal-dac";
16 img,cr-top = <&cr_top>;
17 VDD-supply = <&supply3v3>;
|
| /kernel/linux/linux-5.10/arch/x86/include/asm/ |
| D | pgtable_64_types.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
12 * These are used to make use of C type-checking..
53 * PGDIR_SHIFT determines what a top-level page table entry can map
59 * 4th level page in 5-level paging case
65 #define P4D_MASK (~(P4D_SIZE - 1))
72 * PGDIR_SHIFT determines what a top-level page table entry can map
81 * 3rd level page
87 * PMD_SHIFT determines the size of the area a middle-level
94 * entries per page directory level
99 #define PMD_MASK (~(PMD_SIZE - 1))
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|
| D | processor-flags.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <uapi/asm/processor-flags.h>
17 * If CR4.PCIDE is set (64-bit only), then CR3[11:0] is the address space ID.
19 * (i.e. it's 32-byte aligned, not page-aligned) and CR3[4:0] is ignored.
20 * Otherwise (non-PAE, non-PCID), CR3[3] is PWT, CR3[4] is PCD, and
29 * that the top-level paging structure is encrypted.
31 * All of the remaining bits indicate the physical address of the top-level
|
| /kernel/linux/linux-5.10/Documentation/powerpc/ |
| D | imc.rst | 1 .. SPDX-License-Identifier: GPL-2.0
5 IMC (In-Memory Collection Counters)
17 IMC (In-Memory collection counters) is a hardware monitoring facility that
18 collects large numbers of hardware performance events at Nest level (these are
19 on-chip but off-core), Core level and Thread level.
22 (On-Chip Controller) complex. The microcode collects the counter data and moves
25 The Core and Thread IMC PMU counters are handled in the core. Core level PMU
26 counters give us the IMC counters' data per core and thread level PMU counters
33 - Event name
34 - Event Offset
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|
| /kernel/linux/linux-5.10/scripts/ |
| D | find-unused-docs.sh | 5 # This script detects files with kernel-doc comments for exported functions
8 # usage: Run 'scripts/find-unused-docs.sh directory' from top level of kernel
11 # example: $scripts/find-unused-docs.sh drivers/scsi
15 if ! [ -d "Documentation" ]; then
16 echo "Run from top level of kernel tree"
20 if [ "$#" -ne 1 ]; then
21 echo "Usage: scripts/find-unused-docs.sh directory"
25 if ! [ -d "$1" ]; then
40 files_included=($(grep -rHR ".. kernel-doc" --include \*.rst | cut -d " " -f 3))
42 declare -A FILES_INCLUDED
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|
| /kernel/linux/linux-5.10/arch/powerpc/platforms/44x/ |
| D | iss4xx.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * Copyright 2002-2005 MontaVista Software Inc.
12 * Copyright (c) 2003-2005 Zultys Technologies
53 /* Find top level interrupt controller */ in iss4xx_init_irq()
54 for_each_node_with_property(np, "interrupt-controller") { in iss4xx_init_irq()
59 panic("Can't find top level interrupt controller"); in iss4xx_init_irq()
66 } else if (of_device_is_compatible(np, "chrp,open-pic")) { in iss4xx_init_irq()
68 * device-tree, just pass 0 to all arguments in iss4xx_init_irq()
76 panic("Unrecognized top level interrupt controller"); in iss4xx_init_irq()
94 /* Assume spin table. We could test for the enable-method in in smp_iss4xx_kick_cpu()
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|
| /kernel/linux/linux-5.10/Documentation/admin-guide/cifs/ |
| D | winucase_convert.pl | 1 #!/usr/bin/perl -w
3 # winucase_convert.pl -- convert "Windows 8 Upper Case Mapping Table.txt" to
4 # a two-level set of C arrays.
28 $top[$firstchar][$secondchar] = $uppercase;
32 next if (!$top[$i]);
41 printf("0x%4.4x,", $top[$i][$j] ? $top[$i][$j] : 0);
50 } elsif ($top[$i]) {
56 if ($top[$i]) {
|
| /kernel/linux/linux-5.10/arch/powerpc/mm/ |
| D | pgtable_32.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * -- paulus
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
45 for (; (s32)(FIXADDR_TOP - addr) > 0; in early_ioremap_init()
78 int err = -ENOMEM; in map_kernel_page()
80 /* Use upper 10 bits of VA to index the first level map */ in map_kernel_page()
82 /* Use middle 10 bits of VA to index the second-level map */ in map_kernel_page()
102 static void __init __mapin_ram_chunk(unsigned long offset, unsigned long top) in __mapin_ram_chunk() argument
111 for (; s < top; s += PAGE_SIZE) { in __mapin_ram_chunk()
130 phys_addr_t top = min(end, total_lowmem); in mapin_ram() local
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|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/opp/ |
| D | qcom-opp.txt | 3 The bindings are based on top of the operating-points-v2 bindings
10 - compatible: Allow OPPs to express their compatibility. It should be:
11 "operating-points-v2-qcom-level"
16 - qcom,opp-fuse-level: A positive value representing the fuse corner/level
18 a certain fuse corner/level. A fuse corner/level contains e.g. ref uV,
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_hw_top.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
32 * struct split_pipe_cfg - pipe configuration for dual display panels
48 * @mdp: top level status
57 * struct dpu_vsync_source_cfg - configure vsync source and configure the
72 * struct dpu_hw_mdp_ops - interface to the MDP TOP Hw driver functions
81 * @mdp : mdp top context driver
89 * @mdp : mdp top context driver
96 * setup_clk_force_ctrl - set clock force control
97 * @mdp: mdp top context driver
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| /kernel/linux/linux-5.10/Documentation/x86/ |
| D | pti.rst | 1 .. SPDX-License-Identifier: GPL-2.0
27 This approach helps to ensure that side-channel attacks leveraging
30 Once enabled at compile-time, it can be disabled at boot with the
31 'nopti' or 'pti=' kernel parameters (see kernel-parameters.txt).
42 crippled by setting the NX bit in the top level. This ensures
43 that any missed kernel->user CR3 switch will immediately crash
49 each CPU's copy of the area a compile-time-fixed virtual address.
53 makes entries in the top (PGD) level. In addition to setting the
57 This sharing at the PGD level also inherently shares all the lower
65 Protection against side-channel attacks is important. But,
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|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/fsi/ |
| D | fsi.txt | 4 The FSI bus is probe-able, so the OS is able to enumerate FSI slaves, and
6 nodes to probed engines. This allows for fsi engines to expose non-probeable
8 that is an I2C master - the I2C bus can be described by the device tree under
13 the fsi-master-* binding specifications.
18 fsi-master {
19 /* top-level of FSI bus topology, bound to an FSI master driver and
22 fsi-slave@<link,id> {
26 fsi-slave-engine@<addr> {
32 fsi-slave-engine@<addr> {
39 Note that since the bus is probe-able, some (or all) of the topology may
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/ |
| D | gen8_ppgtt.c | 1 // SPDX-License-Identifier: MIT
17 const enum i915_cache_level level) in gen8_pde_encode() argument
21 if (level != I915_CACHE_NONE) in gen8_pde_encode()
30 enum i915_cache_level level, in gen8_pte_encode() argument
38 switch (level) { in gen8_pte_encode()
55 struct drm_i915_private *i915 = ppgtt->vm.i915; in gen8_ppgtt_notify_vgt()
56 struct intel_uncore *uncore = ppgtt->vm.gt->uncore; in gen8_ppgtt_notify_vgt()
61 atomic_inc(px_used(ppgtt->pd)); /* never remove */ in gen8_ppgtt_notify_vgt()
63 atomic_dec(px_used(ppgtt->pd)); in gen8_ppgtt_notify_vgt()
65 mutex_lock(&i915->vgpu.lock); in gen8_ppgtt_notify_vgt()
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|