Searched +full:vdda +full:- +full:phy +full:- +full:supply (Results 1 – 25 of 122) sorted by relevance
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/ufs/ |
D | ufs-qcom.txt | 1 * Qualcomm Technologies Inc Universal Flash Storage (UFS) PHY 3 UFSPHY nodes are defined to describe on-chip UFS PHY hardware macro. 4 Each UFS PHY node should have its own node. 6 To bind UFS PHY with UFS host controller, the controller node should 7 contain a phandle reference to UFS PHY node. 10 - compatible : compatible list, contains one of the following - 11 "qcom,ufs-phy-qmp-20nm" for 20nm ufs phy, 12 "qcom,ufs-phy-qmp-14nm" for legacy 14nm ufs phy, 13 "qcom,msm8996-ufs-phy-qmp-14nm" for 14nm ufs phy 15 - reg : should contain PHY register address space (mandatory), [all …]
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
D | qcom,qmp-usb3-dp-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-usb3-dp-phy.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 8 title: Qualcomm QMP USB3 DP PHY controller 11 - Manu Gautam <mgautam@codeaurora.org> 16 - qcom,sc7180-qmp-usb3-dp-phy 17 - qcom,sc7180-qmp-usb3-phy 18 - qcom,sdm845-qmp-usb3-dp-phy 19 - qcom,sdm845-qmp-usb3-phy [all …]
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D | qcom,qusb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 8 title: Qualcomm QUSB2 phy controller 11 - Manu Gautam <mgautam@codeaurora.org> 19 - items: 20 - enum: 21 - qcom,ipq8074-qusb2-phy 22 - qcom,msm8996-qusb2-phy [all …]
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D | qcom-pcie2-phy.txt | 1 Qualcomm PCIe2 PHY controller 4 The Qualcomm PCIe2 PHY is a Synopsys based phy found in a number of Qualcomm 8 - compatible: compatible list, should be: 9 "qcom,qcs404-pcie2-phy", "qcom,pcie2-phy" 11 - reg: offset and length of the PHY register set. 12 - #phy-cells: must be 0. 14 - clocks: a clock-specifier pair for the "pipe" clock 16 - vdda-vp-supply: phandle to low voltage regulator 17 - vdda-vph-supply: phandle to high voltage regulator 19 - resets: reset-specifier pairs for the "phy" and "pipe" resets [all …]
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D | qcom,usb-snps-femto-v2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: "http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#" 5 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 title: Qualcomm Synopsys Femto High-Speed USB PHY V2 10 - Wesley Cheng <wcheng@codeaurora.org> 13 Qualcomm High-Speed USB PHY 18 - qcom,usb-snps-hs-7nm-phy 19 - qcom,sm8150-usb-hs-phy 20 - qcom,usb-snps-femto-v2-phy [all …]
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D | qcom,qmp-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 8 title: Qualcomm QMP PHY controller 11 - Manu Gautam <mgautam@codeaurora.org> 14 QMP phy controller supports physical layer functionality for a number of 20 - qcom,ipq8074-qmp-pcie-phy 21 - qcom,ipq8074-qmp-usb3-phy 22 - qcom,msm8996-qmp-pcie-phy [all …]
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/ |
D | hdmi.txt | 4 - compatible: one of the following 5 * "qcom,hdmi-tx-8996" 6 * "qcom,hdmi-tx-8994" 7 * "qcom,hdmi-tx-8084" 8 * "qcom,hdmi-tx-8974" 9 * "qcom,hdmi-tx-8660" 10 * "qcom,hdmi-tx-8960" 11 - reg: Physical base address and length of the controller's registers 12 - reg-names: "core_physical" 13 - interrupts: The interrupt signal from the hdmi block. [all …]
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D | dsi.txt | 5 - compatible: 6 * "qcom,mdss-dsi-ctrl" 7 - reg: Physical base address and length of the registers of controller 8 - reg-names: The names of register regions. The following regions are required: 10 - interrupts: The interrupt signal from the DSI block. 11 - power-domains: Should be <&mmcc MDSS_GDSC>. 12 - clocks: Phandles to device clocks. 13 - clock-names: the following clocks are required: 25 - assigned-clocks: Parents of "byte" and "pixel" for the given platform. 26 - assigned-clock-parents: The Byte clock and Pixel clock PLL outputs provided [all …]
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/ |
D | sdm845-mtp.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 16 compatible = "qcom,sdm845-mtp", "qcom,sdm845"; 23 stdout-path = "serial0:115200n8"; 26 vph_pwr: vph-pwr-regulator { 27 compatible = "regulator-fixed"; 28 regulator-name = "vph_pwr"; 29 regulator-min-microvolt = <3700000>; [all …]
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D | msm8998-mtp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 16 stdout-path = "serial0:115200n8"; 19 vph_pwr: vph-pwr-regulator { 20 compatible = "regulator-fixed"; 21 regulator-name = "vph_pwr"; 22 regulator-always-on; 23 regulator-boot-on; 31 compatible = "qcom,wcn3990-bt"; 33 vddio-supply = <&vreg_s4a_1p8>; 34 vddxo-supply = <&vreg_l7a_1p8>; [all …]
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D | sdm850-lenovo-yoga-c630.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 12 #include <dt-bindings/sound/qcom,q6afe.h> 13 #include <dt-bindings/sound/qcom,q6asm.h> 19 compatible = "lenovo,yoga-c630", "qcom,sdm845"; 27 firmware-name = "qcom/LENOVO/81JL/qcadsp850.mbn"; 32 pm8998-rpmh-regulators { 33 compatible = "qcom,pm8998-rpmh-regulators"; [all …]
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D | sdm845-db845c.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11 #include <dt-bindings/sound/qcom,q6afe.h> 12 #include <dt-bindings/sound/qcom,q6asm.h> 27 stdout-path = "serial0:115200n8"; 30 dc12v: dc12v-regulator { 31 compatible = "regulator-fixed"; [all …]
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D | sdm845-xiaomi-beryllium.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 16 /delete-node/ &tz_mem; 17 /delete-node/ &adsp_mem; 18 /delete-node/ &wlan_msa_mem; 19 /delete-node/ &mpss_region; 20 /delete-node/ &venus_mem; [all …]
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D | apq8096-db820c.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved. 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 12 #include <dt-bindings/sound/qcom,q6afe.h> 13 #include <dt-bindings/sound/qcom,q6asm.h> 27 * drawing no: LM25-P2751-1 38 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 55 stdout-path = "serial0:115200n8"; [all …]
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D | sm8150-mtp.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. 7 /dts-v1/; 9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 10 #include <dt-bindings/gpio/gpio.h> 18 compatible = "qcom,sm8150-mtp"; 25 stdout-path = "serial0:115200n8"; 28 vph_pwr: vph-pwr-regulator { 29 compatible = "regulator-fixed"; 30 regulator-name = "vph_pwr"; [all …]
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D | sdm845-cheza.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 26 stdout-path = "serial0:115200n8"; 30 compatible = "pwm-backlight"; 32 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; 33 power-supply = <&ppvar_sys>; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&ap_edp_bklten>; [all …]
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D | msm8998-clamshell.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 18 vph_pwr: vph-pwr-regulator { 19 compatible = "regulator-fixed"; 20 regulator-name = "vph_pwr"; 21 regulator-always-on; 22 regulator-boot-on; 30 compatible = "qcom,wcn3990-bt"; 32 vddio-supply = <&vreg_s4a_1p8>; 33 vddxo-supply = <&vreg_l7a_1p8>; 34 vddrf-supply = <&vreg_l17a_1p3>; [all …]
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/kernel/linux/linux-5.10/arch/arm/boot/dts/ |
D | stm32h743i-eval.dts | 2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> 4 * This file is dual-licensed: you can use it either under the terms 43 /dts-v1/; 45 #include "stm32h743-pinctrl.dtsi" 48 model = "STMicroelectronics STM32H743i-EVAL board"; 49 compatible = "st,stm32h743i-eval", "st,stm32h743"; 53 stdout-path = "serial0:115200n8"; 65 vdda: regulator-vdda { label 66 compatible = "regulator-fixed"; 67 regulator-name = "vdda"; [all …]
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D | stm32mp15xx-dhcom-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de> 6 #include "stm32mp15-pinctrl.dtsi" 7 #include "stm32mp15xxaa-pinctrl.dtsi" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/mfd/st,stpmic1.h> 21 reserved-memory { 22 #address-cells = <1>; 23 #size-cells = <1>; 27 compatible = "shared-dma-pool"; [all …]
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D | stm32429i-eval.dts | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 22 * MA 02110-1301 USA 48 /dts-v1/; 50 #include "stm32f429-pinctrl.dtsi" 51 #include <dt-bindings/input/input.h> 52 #include <dt-bindings/gpio/gpio.h> 55 model = "STMicroelectronics STM32429i-EVAL board"; 56 compatible = "st,stm32429i-eval", "st,stm32f429"; 60 stdout-path = "serial0:115200n8"; [all …]
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D | qcom-apq8064-ifc6410.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "qcom-apq8064-v2.0.dtsi" 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 8 compatible = "qcom,apq8064-ifc6410", "qcom,apq8064"; 21 stdout-path = "serial0:115200n8"; 25 compatible = "simple-bus"; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&wlan_default_gpios>; 30 compatible = "mmc-pwrseq-simple"; [all …]
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D | stm32mp157c-ed1.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 /dts-v1/; 10 #include "stm32mp15-pinctrl.dtsi" 11 #include "stm32mp15xxaa-pinctrl.dtsi" 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/mfd/st,stpmic1.h> 17 compatible = "st,stm32mp157c-ed1", "st,stm32mp157"; 20 stdout-path = "serial0:115200n8"; 28 reserved-memory { [all …]
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D | stm32mp15xx-dhcor-avenger96.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved 9 #include "stm32mp15xx-dhcor-io1v8.dtsi" 22 cec_clock: clk-cec-fixed { 23 #clock-cells = <0>; 24 compatible = "fixed-clock"; 25 clock-frequency = <24000000>; 29 stdout-path = "serial0:115200n8"; 32 hdmi-out { 33 compatible = "hdmi-connector"; [all …]
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ti/ |
D | ti,omap4-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic 8 -------- 11 - compatible: "ti,omap4-dss" 12 - reg: address and length of the register space 13 - ti,hwmods: "dss_core" 14 - clocks: handle to fclk 15 - clock-names: "fck" 18 - DISPC 21 - DSS Submodules: RFBI, VENC, DSI, HDMI 22 - Video port for DPI output [all …]
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D | ti,omap5-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic 8 -------- 11 - compatible: "ti,omap5-dss" 12 - reg: address and length of the register space 13 - ti,hwmods: "dss_core" 14 - clocks: handle to fclk 15 - clock-names: "fck" 18 - DISPC 21 - DSS Submodules: RFBI, DSI, HDMI 22 - Video port for DPI output [all …]
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