| /kernel/linux/linux-5.10/tools/testing/selftests/powerpc/mm/ |
| D | pkey_siginfo.c | 1 // SPDX-License-Identifier: GPL-2.0
44 if (sinfo->si_code != SEGV_PKUERR) { in segv_handler()
50 if (sinfo->si_addr != (void *) fault_addr) { in segv_handler()
68 pgstart = (void *) ((unsigned long) fault_addr & ~(pgsize - 1)); in segv_handler()
72 * reassociate the page with the exec-only pkey since execute in segv_handler()
77 * read-write rights, change the AMR permission bits for the in segv_handler()
97 static void *protect(void *p) in protect() function
105 base = ((struct region *) p)->base; in protect()
106 size = ((struct region *) p)->size; in protect()
109 /* No read, write and execute restrictions */ in protect()
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| /kernel/linux/linux-5.10/Documentation/misc-devices/ |
| D | eeprom.rst | 11 Addresses scanned: I2C 0x50 - 0x57
28 24C01 1K 0x50 (shadows at 0x51 - 0x57)
29 24C01A 1K 0x50 - 0x57 (Typical device on DIMMs)
30 24C02 2K 0x50 - 0x57
35 24C16 16K 0x50 (additional data at 0x51 - 0x57)
38 Atmel 34C02B 2K 0x50 - 0x57, SW write protect at 0x30-37
39 Catalyst 34FC02 2K 0x50 - 0x57, SW write protect at 0x30-37
40 Catalyst 34RC02 2K 0x50 - 0x57, SW write protect at 0x30-37
41 Fairchild 34W02 2K 0x50 - 0x57, SW write protect at 0x30-37
42 Microchip 24AA52 2K 0x50 - 0x57, SW write protect at 0x30-37
[all …]
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| /kernel/linux/linux-5.10/include/soc/at91/ |
| D | at91sam9_ddrsdr.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
46 #define AT91_DDRSDRC_OCD (1 << 12) /* Off-Chip Driver [SAM9 Only] */
53 #define AT91_DDRSDRC_TWR (0xf << 8) /* Write recovery delay */
57 #define AT91_DDRSDRC_TWTR (0x7 << 24) /* Internal Write to Read delay */
58 #define AT91_DDRSDRC_RED_WRRD (0x1 << 27) /* Reduce Write to Read Delay [SAM9 Only] */
63 #define AT91_DDRSDRC_TXSNR (0xff << 8) /* Exit self-refresh to non-read */
64 #define AT91_DDRSDRC_TXSRD (0xff << 16) /* Exit self-refresh to read */
65 #define AT91_DDRSDRC_TXP (0xf << 24) /* Exit power-down delay */
74 #define AT91_DDRSDRC_LPCB (3 << 0) /* Low-power Configurations */
114 #define AT91_DDRSDRC_WPMR 0xE4 /* Write Protect Mode Register [SAM9 Only] */
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| /kernel/linux/linux-5.10/arch/mips/sgi-ip22/ |
| D | ip22-nvram.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * ip22-nvram.c: NVRAM and serial EEPROM handling.
5 * Copyright (C) 2003 Ladislav Michl (ladis@linux-mips.org)
14 #define EEPROM_WEN 0x9800 /* write enable before prog modes */
15 #define EEPROM_WRITE 0xa000 /* serial memory write */
16 #define EEPROM_WRALL 0x8800 /* write all registers */
18 #define EEPROM_PRREAD 0xc000 /* read protect register */
19 #define EEPROM_PREN 0x9800 /* enable protect register mode */
20 #define EEPROM_PRCLEAR 0xffff /* clear protect register */
21 #define EEPROM_PRWRITE 0xa000 /* write protect register */
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| /kernel/linux/linux-5.10/include/linux/platform_data/ |
| D | mmc-s3cmci.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * struct s3c24xx_mci_pdata - sd/mmc controller platform data
7 * @no_wprotect: Set this to indicate there is no write-protect switch.
9 * @wprotect_invert: Invert the default sense of the write protect switch.
12 * @gpio_wprotect: GPIO number for the write protect line.
13 * @ocr_avail: The mask of the available power states, non-zero to use.
21 * The driver will use @gpio_wprotect to signal whether the card is write
23 * means the card is read/write, and 1 means read-only. The @wprotect_invert
27 * to a non-zero value, otherwise the default of 3.2-3.4V is used.
42 * s3c24xx_mci_set_platdata - set platform data for mmc/sdi device
|
| /kernel/linux/linux-5.10/security/ |
| D | min_addr.c | 1 // SPDX-License-Identifier: GPL-2.0
7 /* amount of vm to protect from userspace access by both DAC and the LSM*/
9 /* amount of vm to protect from userspace using CAP_SYS_RAWIO (DAC) */
11 /* amount of vm to protect from userspace using the LSM = CONFIG_LSM_MMAP_MIN_ADDR */
32 int mmap_min_addr_handler(struct ctl_table *table, int write, in mmap_min_addr_handler() argument
37 if (write && !capable(CAP_SYS_RAWIO)) in mmap_min_addr_handler()
38 return -EPERM; in mmap_min_addr_handler()
40 ret = proc_doulongvec_minmax(table, write, buffer, lenp, ppos); in mmap_min_addr_handler()
|
| /kernel/linux/linux-5.10/drivers/lightnvm/ |
| D | pblk-rb.c | 1 // SPDX-License-Identifier: GPL-2.0
17 * pblk-rb.c - pblk's write buffer
31 list_for_each_entry_safe(p, t, &rb->pages, list) { in pblk_rb_data_free()
32 free_pages((unsigned long)page_address(p->pages), p->order); in pblk_rb_data_free()
33 list_del(&p->list); in pblk_rb_data_free()
42 vfree(rb->entries); in pblk_rb_free()
46 * pblk_rb_calculate_size -- calculate the size of the write buffer
55 /* Alloc a write buffer that can (i) fit at least two split bios in pblk_rb_calculate_size()
70 * (Documentation/core-api/circular-buffers.rst)
78 unsigned int max_order = MAX_ORDER - 1; in pblk_rb_init()
[all …]
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| /kernel/linux/linux-5.10/include/linux/mtd/ |
| D | spi-nor.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
12 #include <linux/spi/spi-mem.h>
19 * requires a 4-byte (32-bit) address.
23 #define SPINOR_OP_WRDI 0x04 /* Write disable */
24 #define SPINOR_OP_WREN 0x06 /* Write enable */
26 #define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */
28 #define SPINOR_OP_WRSR2 0x3e /* Write status register 2 */
53 #define SPINOR_OP_WREAR 0xc5 /* Write Extended Address Register */
55 /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
73 /* Double Transfer Rate opcodes - defined in JEDEC JESD216B. */
[all …]
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| /kernel/linux/linux-5.10/drivers/usb/gadget/function/ |
| D | g_zero.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * interfaces to its two single-configuration function drivers.
41 * Read/write access to configfs attributes is handled by configfs.
43 * This is to protect the data from concurrent access by read/write
56 * Read/write access to configfs attributes is handled by configfs.
58 * This is to protect the data from concurrent access by read/write
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| /kernel/linux/linux-5.10/fs/jffs2/ |
| D | jffs2_fs_sb.h | 2 * JFFS2 -- Journalling Flash File System, Version 2.
4 * Copyright © 2001-2007 Red Hat, Inc.
5 * Copyright © 2004-2010 David Woodhouse <dwmw2@infradead.org>
39 * latter users to write to the file system if the amount if the
61 struct mutex alloc_sem; /* Used to protect all the following
62 fields, and also to protect against
63 out-of-order writing of nodes. And GC. */
81 uint8_t resv_blocks_write; /* ... allow a normal filesystem write */
96 struct jffs2_eraseblock *gcblock; /* The block we're currently garbage-collecting */
111 spinlock_t erase_completion_lock; /* Protect free_list and erasing_list
[all …]
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| /kernel/linux/linux-5.10/drivers/rtc/ |
| D | rtc-max6900.c | 23 #define MAX6900_REG_SC 0 /* seconds 00-59 */
24 #define MAX6900_REG_MN 1 /* minutes 00-59 */
25 #define MAX6900_REG_HR 2 /* hours 00-23 */
26 #define MAX6900_REG_DT 3 /* day of month 00-31 */
27 #define MAX6900_REG_MO 4 /* month 01-12 */
28 #define MAX6900_REG_DW 5 /* day of week 1-7 */
29 #define MAX6900_REG_YR 6 /* year 00-99 */
37 #define MAX6900_REG_CT_WP (1 << 7) /* Write Protect */
40 * register read/write commands
59 .addr = client->addr, in max6900_i2c_read_regs()
[all …]
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| /kernel/linux/linux-5.10/Documentation/admin-guide/device-mapper/ |
| D | dm-integrity.rst | 2 dm-integrity
5 The dm-integrity target emulates a block device that has additional
6 per-sector tags that can be used for storing integrity information.
9 writing the sector and the integrity tag must be atomic - i.e. in case of
12 To guarantee write atomicity, the dm-integrity target uses journal, it
16 The dm-integrity target can be used with the dm-crypt target - in this
17 situation the dm-crypt target creates the integrity data and passes them
18 to the dm-integrity target via bio_integrity_payload attached to the bio.
19 In this mode, the dm-crypt and dm-integrity targets provide authenticated
20 disk encryption - if the attacker modifies the encrypted device, an I/O
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
46 non-removable:
[all …]
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| /kernel/linux/linux-5.10/drivers/target/ |
| D | target_core_sbc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * (c) Copyright 2002-2013 Datera, Inc.
13 #include <linux/crc-t10dif.h>
14 #include <linux/t10-pi.h>
34 struct se_device *dev = cmd->se_dev; in sbc_emulate_readcapacity()
35 unsigned char *cdb = cmd->t_task_cdb; in sbc_emulate_readcapacity()
36 unsigned long long blocks_long = dev->transport->get_blocks(dev); in sbc_emulate_readcapacity()
42 * SBC-2 says: in sbc_emulate_readcapacity()
49 * In SBC-3, these fields are obsolete, but some SCSI in sbc_emulate_readcapacity()
51 * follow SBC-2. in sbc_emulate_readcapacity()
[all …]
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| /kernel/linux/linux-5.10/include/linux/clk/ |
| D | at91_pmc.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 * Power Management Controller (PMC) - System peripherals registers.
55 #define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */
57 #define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI BIAS Start-up Time */
69 #define AT91_PMC_MOSCRCEN (1 << 3) /* Main On-Chip RC Oscillator Enable [some SAM9] */
70 #define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */
156 #define AT91_PMC_PCKR(n) (0x40 + ((n) * 4)) /* Programmable Clock 0-N Registers */
177 #define AT91_PMC_MOSCRCS (1 << 17) /* Main On-Chip RC [some SAM9] */
189 #define AT91_PMC_LPM BIT(20) /* Low-power Mode */
199 #define AT91_PMC_PROT 0xe4 /* Write Protect Mode Register [some SAM9] */
[all …]
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| /kernel/linux/linux-5.10/mm/ |
| D | mapping_dirty_helpers.c | 1 // SPDX-License-Identifier: GPL-2.0
10 * struct wp_walk - Private struct for pagetable walk callbacks
24 * wp_pte - Write-protect a pte
29 * The function write-protects a pte and records the range in
35 struct wp_walk *wpwalk = walk->private; in wp_pte()
39 pte_t old_pte = ptep_modify_prot_start(walk->vma, addr, pte); in wp_pte()
42 ptep_modify_prot_commit(walk->vma, addr, pte, old_pte, ptent); in wp_pte()
43 wpwalk->total++; in wp_pte()
44 wpwalk->tlbflush_start = min(wpwalk->tlbflush_start, addr); in wp_pte()
45 wpwalk->tlbflush_end = max(wpwalk->tlbflush_end, in wp_pte()
[all …]
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| /kernel/linux/linux-5.10/include/linux/ |
| D | fsl_ifc.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
21 * - IFC version 1.0 implements 4 banks.
22 * - IFC version 1.1 onward implements 8 banks.
35 * CSPR - Chip Select Property Register
47 /* Write Protect */
69 (__ilog2(n) - IFC_AMASK_SHIFT))
110 #define CSOR_NAND_PB(n) ((__ilog2(n) - 5) << CSOR_NAND_PB_SHIFT)
123 * Chip Select Option Register - NOR Flash Mode
150 * Chip Select Option Register - GPCM Mode
152 /* GPCM Mode - Normal */
[all …]
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| /kernel/linux/linux-5.10/drivers/pinctrl/ |
| D | pinctrl-equilibrium.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
107 * @lock: spin lock to protect gpio register write.
117 raw_spinlock_t lock; /* protect gpio register */
130 * @lock: protect pinctrl register write
141 raw_spinlock_t lock; /* protect pinpad register */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/nvmem/ |
| D | nvmem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
24 pattern: "^(eeprom|efuse|nvram)(@.*|-[0-9a-f])*$"
26 "#address-cells":
29 "#size-cells":
32 read-only:
37 wp-gpios:
39 GPIO to which the write-protect pin of the chip is connected.
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | arm,pl172.txt | 5 - compatible: Must be "arm,primecell" and exactly one from
8 - reg: Must contains offset/length value for controller.
10 - #address-cells: Must be 2. The partition number has to be encoded in the
11 first address cell and it may accept values 0..N-1
12 (N - total number of partitions). The second cell is the
15 - #size-cells: Must be set to 1.
17 - ranges: Must contain one or more chip select memory regions.
19 - clocks: Must contain references to controller clocks.
21 - clock-names: Must contain "mpmcclk" and "apb_pclk".
23 - clock-ranges: Empty property indicating that child nodes can inherit
[all …]
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| /kernel/linux/linux-5.10/tools/laptop/freefall/ |
| D | freefall.c | 1 // SPDX-License-Identifier: GPL-2.0-only
32 return -EINVAL; in set_unload_heads_path()
33 strncpy(device_path, device, sizeof(device_path) - 1); in set_unload_heads_path()
35 snprintf(unload_heads_path, sizeof(unload_heads_path) - 1, in set_unload_heads_path()
65 if (write(fd, buf, strlen(buf)) != strlen(buf)) { in write_int()
66 perror("write"); in write_int()
80 static void protect(int seconds) in protect() function
102 protect(0); in ignore_me()
117 ret = -EINVAL; in main()
152 if ((ret == -1) && (errno == EINTR)) { in main()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/vmwgfx/ |
| D | vmwgfx_page_dirty.c | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
31 * VMW_BO_DIRTY_PAGETABLE - Scan the pagetable for hardware dirty bits
32 * VMW_BO_DIRTY_MKWRITE - Write-protect page table entries and record write-
52 * struct vmw_bo_dirty - Dirty information for buffer objects
76 * vmw_bo_dirty_scan_pagetable - Perform a pagetable scan for dirty bits
81 * dirty-tracking method.
85 struct vmw_bo_dirty *dirty = vbo->dirty; in vmw_bo_dirty_scan_pagetable()
86 pgoff_t offset = drm_vma_node_start(&vbo->base.base.vma_node); in vmw_bo_dirty_scan_pagetable()
87 struct address_space *mapping = vbo->base.bdev->dev_mapping; in vmw_bo_dirty_scan_pagetable()
[all …]
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| /kernel/linux/linux-5.10/drivers/scsi/ |
| D | pmcraid.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * pmcraid.h -- PMC Sierra MaxRAID controller driver header file
5 * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
6 * PMC-Sierra Inc
39 #define PMC_BIT8(n) (1 << (7-n))
40 #define PMC_BIT16(n) (1 << (15-n))
41 #define PMC_BIT32(n) (1 << (31-n))
58 /* MAX_IOADLS : max number of scatter-gather lists supported by IOA
197 /* structure to represent a scatter-gather element (IOADL descriptor) */
526 /* pmcraid_sglist - Scatter-gather list allocated for passthrough ioctls
[all …]
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| /kernel/linux/linux-5.10/arch/m68k/include/asm/ |
| D | m53xxacr.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * m53xxacr.h -- ColdFire version 3 core cache support
18 * configurable write-through or copy-back operation.
30 #define CACR_DCM_WT 0x00000000 /* Cacheable write-through */
31 #define CACR_DCM_CB 0x00000100 /* Cacheable copy-back */
34 #define CACR_WPROTECT 0x00000020 /* Write protect*/
46 #define ACR_CM_WT 0x00000000 /* Cacheable, write-through */
47 #define ACR_CM_CB 0x00000020 /* Cacheable, copy-back */
50 #define ACR_WPROTECT 0x00000004 /* Write protect region */
66 #define CACHE_WAYS 4 /* 4 ways - set associative */
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| /kernel/linux/linux-5.10/include/xen/interface/ |
| D | features.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 * If set, the guest does not need to write-protect its pagetables, and can
20 * If set, the guest does not need to write-protect its segment descriptor
26 * If set, translation between the guest's 'pseudo-physical' address space
28 * mode the guest does not need to perform phys-to/from-machine translations
79 * must be located in lower 1MB, as required by ACPI Specification for IA-PC
|