1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC 4 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC 5 * 6 * Copyright (C) 2013 Atmel, 7 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com> 8 */ 9 10#include <dt-bindings/dma/at91.h> 11#include <dt-bindings/pinctrl/at91.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13#include <dt-bindings/gpio/gpio.h> 14#include <dt-bindings/clock/at91.h> 15 16/ { 17 #address-cells = <1>; 18 #size-cells = <1>; 19 model = "Atmel SAMA5D3 family SoC"; 20 compatible = "atmel,sama5d3", "atmel,sama5"; 21 interrupt-parent = <&aic>; 22 23 aliases { 24 serial0 = &dbgu; 25 serial1 = &usart0; 26 serial2 = &usart1; 27 serial3 = &usart2; 28 serial4 = &usart3; 29 serial5 = &uart0; 30 gpio0 = &pioA; 31 gpio1 = &pioB; 32 gpio2 = &pioC; 33 gpio3 = &pioD; 34 gpio4 = &pioE; 35 tcb0 = &tcb0; 36 i2c0 = &i2c0; 37 i2c1 = &i2c1; 38 i2c2 = &i2c2; 39 ssc0 = &ssc0; 40 ssc1 = &ssc1; 41 pwm0 = &pwm0; 42 }; 43 cpus { 44 #address-cells = <1>; 45 #size-cells = <0>; 46 cpu@0 { 47 device_type = "cpu"; 48 compatible = "arm,cortex-a5"; 49 reg = <0x0>; 50 }; 51 }; 52 53 pmu { 54 compatible = "arm,cortex-a5-pmu"; 55 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>; 56 }; 57 58 memory@20000000 { 59 device_type = "memory"; 60 reg = <0x20000000 0x8000000>; 61 }; 62 63 clocks { 64 slow_xtal: slow_xtal { 65 compatible = "fixed-clock"; 66 #clock-cells = <0>; 67 clock-frequency = <0>; 68 }; 69 70 main_xtal: main_xtal { 71 compatible = "fixed-clock"; 72 #clock-cells = <0>; 73 clock-frequency = <0>; 74 }; 75 76 adc_op_clk: adc_op_clk{ 77 compatible = "fixed-clock"; 78 #clock-cells = <0>; 79 clock-frequency = <1000000>; 80 }; 81 }; 82 83 sram: sram@300000 { 84 compatible = "mmio-sram"; 85 reg = <0x00300000 0x20000>; 86 #address-cells = <1>; 87 #size-cells = <1>; 88 ranges = <0 0x00300000 0x20000>; 89 }; 90 91 ahb { 92 compatible = "simple-bus"; 93 #address-cells = <1>; 94 #size-cells = <1>; 95 ranges; 96 97 apb { 98 compatible = "simple-bus"; 99 #address-cells = <1>; 100 #size-cells = <1>; 101 ranges; 102 103 mmc0: mmc@f0000000 { 104 compatible = "atmel,hsmci"; 105 reg = <0xf0000000 0x600>; 106 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; 107 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>; 108 dma-names = "rxtx"; 109 pinctrl-names = "default"; 110 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>; 111 status = "disabled"; 112 #address-cells = <1>; 113 #size-cells = <0>; 114 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; 115 clock-names = "mci_clk"; 116 }; 117 118 spi0: spi@f0004000 { 119 #address-cells = <1>; 120 #size-cells = <0>; 121 compatible = "atmel,at91rm9200-spi"; 122 reg = <0xf0004000 0x100>; 123 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; 124 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>, 125 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>; 126 dma-names = "tx", "rx"; 127 pinctrl-names = "default"; 128 pinctrl-0 = <&pinctrl_spi0>; 129 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; 130 clock-names = "spi_clk"; 131 status = "disabled"; 132 }; 133 134 ssc0: ssc@f0008000 { 135 compatible = "atmel,at91sam9g45-ssc"; 136 reg = <0xf0008000 0x4000>; 137 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>; 138 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>, 139 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>; 140 dma-names = "tx", "rx"; 141 pinctrl-names = "default"; 142 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 143 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; 144 clock-names = "pclk"; 145 status = "disabled"; 146 }; 147 148 tcb0: timer@f0010000 { 149 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; 150 #address-cells = <1>; 151 #size-cells = <0>; 152 reg = <0xf0010000 0x100>; 153 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; 154 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&clk32k>; 155 clock-names = "t0_clk", "slow_clk"; 156 }; 157 158 i2c0: i2c@f0014000 { 159 compatible = "atmel,at91sam9x5-i2c"; 160 reg = <0xf0014000 0x4000>; 161 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>; 162 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>, 163 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>; 164 dma-names = "tx", "rx"; 165 pinctrl-names = "default", "gpio"; 166 pinctrl-0 = <&pinctrl_i2c0>; 167 pinctrl-1 = <&pinctrl_i2c0_gpio>; 168 sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>; 169 scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 170 #address-cells = <1>; 171 #size-cells = <0>; 172 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; 173 status = "disabled"; 174 }; 175 176 i2c1: i2c@f0018000 { 177 compatible = "atmel,at91sam9x5-i2c"; 178 reg = <0xf0018000 0x4000>; 179 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>; 180 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>, 181 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>; 182 dma-names = "tx", "rx"; 183 pinctrl-names = "default", "gpio"; 184 pinctrl-0 = <&pinctrl_i2c1>; 185 pinctrl-1 = <&pinctrl_i2c1_gpio>; 186 sda-gpios = <&pioC 26 GPIO_ACTIVE_HIGH>; 187 scl-gpios = <&pioC 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 188 #address-cells = <1>; 189 #size-cells = <0>; 190 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; 191 status = "disabled"; 192 }; 193 194 usart0: serial@f001c000 { 195 compatible = "atmel,at91sam9260-usart"; 196 reg = <0xf001c000 0x100>; 197 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; 198 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>, 199 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 200 dma-names = "tx", "rx"; 201 pinctrl-names = "default"; 202 pinctrl-0 = <&pinctrl_usart0>; 203 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 204 clock-names = "usart"; 205 status = "disabled"; 206 }; 207 208 usart1: serial@f0020000 { 209 compatible = "atmel,at91sam9260-usart"; 210 reg = <0xf0020000 0x100>; 211 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>; 212 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>, 213 <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 214 dma-names = "tx", "rx"; 215 pinctrl-names = "default"; 216 pinctrl-0 = <&pinctrl_usart1>; 217 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 218 clock-names = "usart"; 219 status = "disabled"; 220 }; 221 222 uart0: serial@f0024000 { 223 compatible = "atmel,at91sam9260-usart"; 224 reg = <0xf0024000 0x100>; 225 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 226 pinctrl-names = "default"; 227 pinctrl-0 = <&pinctrl_uart0>; 228 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; 229 clock-names = "usart"; 230 status = "disabled"; 231 }; 232 233 pwm0: pwm@f002c000 { 234 compatible = "atmel,sama5d3-pwm"; 235 reg = <0xf002c000 0x300>; 236 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>; 237 #pwm-cells = <3>; 238 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>; 239 status = "disabled"; 240 }; 241 242 isi: isi@f0034000 { 243 compatible = "atmel,at91sam9g45-isi"; 244 reg = <0xf0034000 0x4000>; 245 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>; 246 pinctrl-names = "default"; 247 pinctrl-0 = <&pinctrl_isi_data_0_7>; 248 clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; 249 clock-names = "isi_clk"; 250 status = "disabled"; 251 port { 252 #address-cells = <1>; 253 #size-cells = <0>; 254 }; 255 }; 256 257 sfr: sfr@f0038000 { 258 compatible = "atmel,sama5d3-sfr", "syscon"; 259 reg = <0xf0038000 0x60>; 260 }; 261 262 mmc1: mmc@f8000000 { 263 compatible = "atmel,hsmci"; 264 reg = <0xf8000000 0x600>; 265 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>; 266 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>; 267 dma-names = "rxtx"; 268 pinctrl-names = "default"; 269 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; 270 status = "disabled"; 271 #address-cells = <1>; 272 #size-cells = <0>; 273 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; 274 clock-names = "mci_clk"; 275 }; 276 277 spi1: spi@f8008000 { 278 #address-cells = <1>; 279 #size-cells = <0>; 280 compatible = "atmel,at91rm9200-spi"; 281 reg = <0xf8008000 0x100>; 282 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; 283 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>, 284 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>; 285 dma-names = "tx", "rx"; 286 pinctrl-names = "default"; 287 pinctrl-0 = <&pinctrl_spi1>; 288 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>; 289 clock-names = "spi_clk"; 290 status = "disabled"; 291 }; 292 293 ssc1: ssc@f800c000 { 294 compatible = "atmel,at91sam9g45-ssc"; 295 reg = <0xf800c000 0x4000>; 296 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>; 297 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>, 298 <&dma1 2 AT91_DMA_CFG_PER_ID(4)>; 299 dma-names = "tx", "rx"; 300 pinctrl-names = "default"; 301 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 302 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; 303 clock-names = "pclk"; 304 status = "disabled"; 305 }; 306 307 adc0: adc@f8018000 { 308 #address-cells = <1>; 309 #size-cells = <0>; 310 compatible = "atmel,at91sam9x5-adc"; 311 reg = <0xf8018000 0x100>; 312 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>; 313 pinctrl-names = "default"; 314 pinctrl-0 = < 315 &pinctrl_adc0_adtrg 316 &pinctrl_adc0_ad0 317 &pinctrl_adc0_ad1 318 &pinctrl_adc0_ad2 319 &pinctrl_adc0_ad3 320 &pinctrl_adc0_ad4 321 &pinctrl_adc0_ad5 322 &pinctrl_adc0_ad6 323 &pinctrl_adc0_ad7 324 &pinctrl_adc0_ad8 325 &pinctrl_adc0_ad9 326 &pinctrl_adc0_ad10 327 &pinctrl_adc0_ad11 328 >; 329 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, 330 <&adc_op_clk>; 331 clock-names = "adc_clk", "adc_op_clk"; 332 atmel,adc-channels-used = <0xfff>; 333 atmel,adc-startup-time = <40>; 334 atmel,adc-use-external-triggers; 335 atmel,adc-vref = <3000>; 336 atmel,adc-res = <10 12>; 337 atmel,adc-sample-hold-time = <11>; 338 atmel,adc-res-names = "lowres", "highres"; 339 status = "disabled"; 340 341 trigger0 { 342 trigger-name = "external-rising"; 343 trigger-value = <0x1>; 344 trigger-external; 345 }; 346 trigger1 { 347 trigger-name = "external-falling"; 348 trigger-value = <0x2>; 349 trigger-external; 350 }; 351 trigger2 { 352 trigger-name = "external-any"; 353 trigger-value = <0x3>; 354 trigger-external; 355 }; 356 trigger3 { 357 trigger-name = "continuous"; 358 trigger-value = <0x6>; 359 }; 360 }; 361 362 i2c2: i2c@f801c000 { 363 compatible = "atmel,at91sam9x5-i2c"; 364 reg = <0xf801c000 0x4000>; 365 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>; 366 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>, 367 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>; 368 dma-names = "tx", "rx"; 369 pinctrl-names = "default", "gpio"; 370 pinctrl-0 = <&pinctrl_i2c2>; 371 pinctrl-1 = <&pinctrl_i2c2_gpio>; 372 sda-gpios = <&pioA 18 GPIO_ACTIVE_HIGH>; 373 scl-gpios = <&pioA 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 374 #address-cells = <1>; 375 #size-cells = <0>; 376 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; 377 status = "disabled"; 378 }; 379 380 usart2: serial@f8020000 { 381 compatible = "atmel,at91sam9260-usart"; 382 reg = <0xf8020000 0x100>; 383 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 384 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>, 385 <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 386 dma-names = "tx", "rx"; 387 pinctrl-names = "default"; 388 pinctrl-0 = <&pinctrl_usart2>; 389 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 390 clock-names = "usart"; 391 status = "disabled"; 392 }; 393 394 usart3: serial@f8024000 { 395 compatible = "atmel,at91sam9260-usart"; 396 reg = <0xf8024000 0x100>; 397 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 398 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>, 399 <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 400 dma-names = "tx", "rx"; 401 pinctrl-names = "default"; 402 pinctrl-0 = <&pinctrl_usart3>; 403 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; 404 clock-names = "usart"; 405 status = "disabled"; 406 }; 407 408 sha@f8034000 { 409 compatible = "atmel,at91sam9g46-sha"; 410 reg = <0xf8034000 0x100>; 411 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>; 412 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>; 413 dma-names = "tx"; 414 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>; 415 clock-names = "sha_clk"; 416 }; 417 418 aes@f8038000 { 419 compatible = "atmel,at91sam9g46-aes"; 420 reg = <0xf8038000 0x100>; 421 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>; 422 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>, 423 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>; 424 dma-names = "tx", "rx"; 425 clocks = <&pmc PMC_TYPE_PERIPHERAL 43>; 426 clock-names = "aes_clk"; 427 }; 428 429 tdes@f803c000 { 430 compatible = "atmel,at91sam9g46-tdes"; 431 reg = <0xf803c000 0x100>; 432 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>; 433 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>, 434 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>; 435 dma-names = "tx", "rx"; 436 clocks = <&pmc PMC_TYPE_PERIPHERAL 44>; 437 clock-names = "tdes_clk"; 438 }; 439 440 trng@f8040000 { 441 compatible = "atmel,at91sam9g45-trng"; 442 reg = <0xf8040000 0x100>; 443 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>; 444 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>; 445 }; 446 447 hsmc: hsmc@ffffc000 { 448 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd"; 449 reg = <0xffffc000 0x1000>; 450 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>; 451 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 452 #address-cells = <1>; 453 #size-cells = <1>; 454 ranges; 455 456 pmecc: ecc-engine@ffffc070 { 457 compatible = "atmel,at91sam9g45-pmecc"; 458 reg = <0xffffc070 0x490>, 459 <0xffffc500 0x100>; 460 }; 461 }; 462 463 dma0: dma-controller@ffffe600 { 464 compatible = "atmel,at91sam9g45-dma"; 465 reg = <0xffffe600 0x200>; 466 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>; 467 #dma-cells = <2>; 468 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>; 469 clock-names = "dma_clk"; 470 }; 471 472 dma1: dma-controller@ffffe800 { 473 compatible = "atmel,at91sam9g45-dma"; 474 reg = <0xffffe800 0x200>; 475 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; 476 #dma-cells = <2>; 477 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>; 478 clock-names = "dma_clk"; 479 }; 480 481 ramc0: ramc@ffffea00 { 482 compatible = "atmel,sama5d3-ddramc"; 483 reg = <0xffffea00 0x200>; 484 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 49>; 485 clock-names = "ddrck", "mpddr"; 486 }; 487 488 dbgu: serial@ffffee00 { 489 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 490 reg = <0xffffee00 0x200>; 491 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; 492 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>, 493 <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 494 dma-names = "tx", "rx"; 495 pinctrl-names = "default"; 496 pinctrl-0 = <&pinctrl_dbgu>; 497 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 498 clock-names = "usart"; 499 status = "disabled"; 500 }; 501 502 aic: interrupt-controller@fffff000 { 503 #interrupt-cells = <3>; 504 compatible = "atmel,sama5d3-aic"; 505 interrupt-controller; 506 reg = <0xfffff000 0x200>; 507 atmel,external-irqs = <47>; 508 }; 509 510 pinctrl: pinctrl@fffff200 { 511 #address-cells = <1>; 512 #size-cells = <1>; 513 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus"; 514 ranges = <0xfffff200 0xfffff200 0xa00>; 515 atmel,mux-mask = < 516 /* A B C */ 517 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */ 518 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */ 519 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */ 520 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */ 521 0xffffffff 0xbf9f8000 0x18000000 /* pioE */ 522 >; 523 524 /* shared pinctrl settings */ 525 adc0 { 526 pinctrl_adc0_adtrg: adc0_adtrg { 527 atmel,pins = 528 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */ 529 }; 530 pinctrl_adc0_ad0: adc0_ad0 { 531 atmel,pins = 532 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */ 533 }; 534 pinctrl_adc0_ad1: adc0_ad1 { 535 atmel,pins = 536 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */ 537 }; 538 pinctrl_adc0_ad2: adc0_ad2 { 539 atmel,pins = 540 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */ 541 }; 542 pinctrl_adc0_ad3: adc0_ad3 { 543 atmel,pins = 544 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */ 545 }; 546 pinctrl_adc0_ad4: adc0_ad4 { 547 atmel,pins = 548 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */ 549 }; 550 pinctrl_adc0_ad5: adc0_ad5 { 551 atmel,pins = 552 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */ 553 }; 554 pinctrl_adc0_ad6: adc0_ad6 { 555 atmel,pins = 556 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */ 557 }; 558 pinctrl_adc0_ad7: adc0_ad7 { 559 atmel,pins = 560 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */ 561 }; 562 pinctrl_adc0_ad8: adc0_ad8 { 563 atmel,pins = 564 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */ 565 }; 566 pinctrl_adc0_ad9: adc0_ad9 { 567 atmel,pins = 568 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */ 569 }; 570 pinctrl_adc0_ad10: adc0_ad10 { 571 atmel,pins = 572 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */ 573 }; 574 pinctrl_adc0_ad11: adc0_ad11 { 575 atmel,pins = 576 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */ 577 }; 578 }; 579 580 dbgu { 581 pinctrl_dbgu: dbgu-0 { 582 atmel,pins = 583 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 584 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 585 }; 586 }; 587 588 ebi { 589 pinctrl_ebi_addr: ebi-addr-0 { 590 atmel,pins = 591 <AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE 592 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE 593 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE 594 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE 595 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE 596 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE 597 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE 598 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE 599 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE 600 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE 601 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE 602 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE 603 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE 604 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE 605 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE 606 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE 607 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE 608 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE 609 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE 610 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE 611 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE 612 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE 613 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; 614 }; 615 616 pinctrl_ebi_nand_addr: ebi-addr-1 { 617 atmel,pins = 618 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE 619 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; 620 }; 621 622 pinctrl_ebi_cs0: ebi-cs0-0 { 623 atmel,pins = 624 <AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; 625 }; 626 627 pinctrl_ebi_cs1: ebi-cs1-0 { 628 atmel,pins = 629 <AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; 630 }; 631 632 pinctrl_ebi_cs2: ebi-cs2-0 { 633 atmel,pins = 634 <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; 635 }; 636 637 pinctrl_ebi_nwait: ebi-nwait-0 { 638 atmel,pins = 639 <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; 640 }; 641 642 pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 { 643 atmel,pins = 644 <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; 645 }; 646 }; 647 648 i2c0 { 649 pinctrl_i2c0: i2c0-0 { 650 atmel,pins = 651 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */ 652 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */ 653 }; 654 655 pinctrl_i2c0_gpio: i2c0-gpio { 656 atmel,pins = 657 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 658 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 659 }; 660 }; 661 662 i2c1 { 663 pinctrl_i2c1: i2c1-0 { 664 atmel,pins = 665 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */ 666 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */ 667 }; 668 669 pinctrl_i2c1_gpio: i2c1-gpio { 670 atmel,pins = 671 <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 672 AT91_PIOC 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 673 }; 674 }; 675 676 i2c2 { 677 pinctrl_i2c2: i2c2-0 { 678 atmel,pins = 679 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */ 680 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */ 681 }; 682 683 pinctrl_i2c2_gpio: i2c2-gpio { 684 atmel,pins = 685 <AT91_PIOA 18 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 686 AT91_PIOA 19 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 687 }; 688 }; 689 690 isi { 691 pinctrl_isi_data_0_7: isi-0-data-0-7 { 692 atmel,pins = 693 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */ 694 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */ 695 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */ 696 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */ 697 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */ 698 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */ 699 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */ 700 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */ 701 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */ 702 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */ 703 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */ 704 }; 705 706 pinctrl_isi_data_8_9: isi-0-data-8-9 { 707 atmel,pins = 708 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */ 709 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */ 710 }; 711 712 pinctrl_isi_data_10_11: isi-0-data-10-11 { 713 atmel,pins = 714 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */ 715 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */ 716 }; 717 }; 718 719 mmc0 { 720 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { 721 atmel,pins = 722 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */ 723 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */ 724 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */ 725 }; 726 pinctrl_mmc0_dat1_3: mmc0_dat1_3 { 727 atmel,pins = 728 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */ 729 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */ 730 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */ 731 }; 732 pinctrl_mmc0_dat4_7: mmc0_dat4_7 { 733 atmel,pins = 734 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */ 735 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */ 736 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */ 737 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */ 738 }; 739 }; 740 741 mmc1 { 742 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 { 743 atmel,pins = 744 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */ 745 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */ 746 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */ 747 }; 748 pinctrl_mmc1_dat1_3: mmc1_dat1_3 { 749 atmel,pins = 750 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */ 751 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */ 752 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */ 753 }; 754 }; 755 756 nand0 { 757 pinctrl_nand0_ale_cle: nand0_ale_cle-0 { 758 atmel,pins = 759 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */ 760 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */ 761 }; 762 }; 763 764 pwm0 { 765 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 { 766 atmel,pins = 767 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */ 768 }; 769 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 { 770 atmel,pins = 771 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */ 772 }; 773 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 { 774 atmel,pins = 775 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */ 776 }; 777 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 { 778 atmel,pins = 779 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */ 780 }; 781 782 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 { 783 atmel,pins = 784 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */ 785 }; 786 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 { 787 atmel,pins = 788 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */ 789 }; 790 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 { 791 atmel,pins = 792 <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */ 793 }; 794 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 { 795 atmel,pins = 796 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */ 797 }; 798 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 { 799 atmel,pins = 800 <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */ 801 }; 802 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 { 803 atmel,pins = 804 <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */ 805 }; 806 807 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 { 808 atmel,pins = 809 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */ 810 }; 811 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 { 812 atmel,pins = 813 <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */ 814 }; 815 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 { 816 atmel,pins = 817 <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */ 818 }; 819 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 { 820 atmel,pins = 821 <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */ 822 }; 823 824 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 { 825 atmel,pins = 826 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */ 827 }; 828 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 { 829 atmel,pins = 830 <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */ 831 }; 832 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 { 833 atmel,pins = 834 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */ 835 }; 836 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 { 837 atmel,pins = 838 <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */ 839 }; 840 }; 841 842 spi0 { 843 pinctrl_spi0: spi0-0 { 844 atmel,pins = 845 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */ 846 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */ 847 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */ 848 }; 849 }; 850 851 spi1 { 852 pinctrl_spi1: spi1-0 { 853 atmel,pins = 854 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */ 855 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */ 856 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */ 857 }; 858 }; 859 860 ssc0 { 861 pinctrl_ssc0_tx: ssc0_tx { 862 atmel,pins = 863 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */ 864 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */ 865 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */ 866 }; 867 868 pinctrl_ssc0_rx: ssc0_rx { 869 atmel,pins = 870 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */ 871 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */ 872 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */ 873 }; 874 }; 875 876 ssc1 { 877 pinctrl_ssc1_tx: ssc1_tx { 878 atmel,pins = 879 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */ 880 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */ 881 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */ 882 }; 883 884 pinctrl_ssc1_rx: ssc1_rx { 885 atmel,pins = 886 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */ 887 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */ 888 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */ 889 }; 890 }; 891 892 uart0 { 893 pinctrl_uart0: uart0-0 { 894 atmel,pins = 895 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */ 896 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */ 897 }; 898 }; 899 900 uart1 { 901 pinctrl_uart1: uart1-0 { 902 atmel,pins = 903 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */ 904 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */ 905 }; 906 }; 907 908 usart0 { 909 pinctrl_usart0: usart0-0 { 910 atmel,pins = 911 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 912 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; 913 }; 914 915 pinctrl_usart0_rts_cts: usart0_rts_cts-0 { 916 atmel,pins = 917 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */ 918 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */ 919 }; 920 }; 921 922 usart1 { 923 pinctrl_usart1: usart1-0 { 924 atmel,pins = 925 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 926 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 927 }; 928 929 pinctrl_usart1_rts_cts: usart1_rts_cts-0 { 930 atmel,pins = 931 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */ 932 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */ 933 }; 934 }; 935 936 usart2 { 937 pinctrl_usart2: usart2-0 { 938 atmel,pins = 939 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A25 */ 940 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts NCS0 */ 941 }; 942 943 pinctrl_usart2_rts_cts: usart2_rts_cts-0 { 944 atmel,pins = 945 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */ 946 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */ 947 }; 948 }; 949 950 usart3 { 951 pinctrl_usart3: usart3-0 { 952 atmel,pins = 953 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A18 */ 954 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with A19 */ 955 }; 956 957 pinctrl_usart3_rts_cts: usart3_rts_cts-0 { 958 atmel,pins = 959 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */ 960 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */ 961 }; 962 }; 963 964 965 pioA: gpio@fffff200 { 966 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 967 reg = <0xfffff200 0x100>; 968 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>; 969 #gpio-cells = <2>; 970 gpio-controller; 971 interrupt-controller; 972 #interrupt-cells = <2>; 973 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 974 }; 975 976 pioB: gpio@fffff400 { 977 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 978 reg = <0xfffff400 0x100>; 979 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>; 980 #gpio-cells = <2>; 981 gpio-controller; 982 interrupt-controller; 983 #interrupt-cells = <2>; 984 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 985 }; 986 987 pioC: gpio@fffff600 { 988 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 989 reg = <0xfffff600 0x100>; 990 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>; 991 #gpio-cells = <2>; 992 gpio-controller; 993 interrupt-controller; 994 #interrupt-cells = <2>; 995 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 996 }; 997 998 pioD: gpio@fffff800 { 999 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 1000 reg = <0xfffff800 0x100>; 1001 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>; 1002 #gpio-cells = <2>; 1003 gpio-controller; 1004 interrupt-controller; 1005 #interrupt-cells = <2>; 1006 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 1007 }; 1008 1009 pioE: gpio@fffffa00 { 1010 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 1011 reg = <0xfffffa00 0x100>; 1012 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>; 1013 #gpio-cells = <2>; 1014 gpio-controller; 1015 interrupt-controller; 1016 #interrupt-cells = <2>; 1017 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 1018 }; 1019 }; 1020 1021 pmc: pmc@fffffc00 { 1022 compatible = "atmel,sama5d3-pmc", "syscon"; 1023 reg = <0xfffffc00 0x120>; 1024 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1025 #clock-cells = <2>; 1026 clocks = <&clk32k>, <&main_xtal>; 1027 clock-names = "slow_clk", "main_xtal"; 1028 }; 1029 1030 reset_controller: rstc@fffffe00 { 1031 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc"; 1032 reg = <0xfffffe00 0x10>; 1033 clocks = <&clk32k>; 1034 }; 1035 1036 shutdown_controller: shutdown-controller@fffffe10 { 1037 compatible = "atmel,at91sam9x5-shdwc"; 1038 reg = <0xfffffe10 0x10>; 1039 clocks = <&clk32k>; 1040 }; 1041 1042 pit: timer@fffffe30 { 1043 compatible = "atmel,at91sam9260-pit"; 1044 reg = <0xfffffe30 0xf>; 1045 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; 1046 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 1047 }; 1048 1049 watchdog: watchdog@fffffe40 { 1050 compatible = "atmel,at91sam9260-wdt"; 1051 reg = <0xfffffe40 0x10>; 1052 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>; 1053 clocks = <&clk32k>; 1054 atmel,watchdog-type = "hardware"; 1055 atmel,reset-type = "all"; 1056 atmel,dbg-halt; 1057 status = "disabled"; 1058 }; 1059 1060 clk32k: sckc@fffffe50 { 1061 compatible = "atmel,sama5d3-sckc"; 1062 reg = <0xfffffe50 0x4>; 1063 clocks = <&slow_xtal>; 1064 #clock-cells = <0>; 1065 }; 1066 1067 rtc@fffffeb0 { 1068 compatible = "atmel,at91rm9200-rtc"; 1069 reg = <0xfffffeb0 0x30>; 1070 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1071 clocks = <&clk32k>; 1072 }; 1073 }; 1074 1075 nfc_sram: sram@200000 { 1076 compatible = "mmio-sram"; 1077 no-memory-wc; 1078 reg = <0x200000 0x2400>; 1079 #address-cells = <1>; 1080 #size-cells = <1>; 1081 ranges = <0 0x200000 0x2400>; 1082 }; 1083 1084 usb0: gadget@500000 { 1085 compatible = "atmel,sama5d3-udc"; 1086 reg = <0x00500000 0x100000 1087 0xf8030000 0x4000>; 1088 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>; 1089 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>, <&pmc PMC_TYPE_CORE PMC_UTMI>; 1090 clock-names = "pclk", "hclk"; 1091 status = "disabled"; 1092 }; 1093 1094 usb1: ohci@600000 { 1095 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 1096 reg = <0x00600000 0x100000>; 1097 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1098 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_SYSTEM 6>; 1099 clock-names = "ohci_clk", "hclk", "uhpck"; 1100 status = "disabled"; 1101 }; 1102 1103 usb2: ehci@700000 { 1104 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1105 reg = <0x00700000 0x100000>; 1106 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1107 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 32>; 1108 clock-names = "usb_clk", "ehci_clk"; 1109 status = "disabled"; 1110 }; 1111 1112 ebi: ebi@10000000 { 1113 compatible = "atmel,sama5d3-ebi"; 1114 #address-cells = <2>; 1115 #size-cells = <1>; 1116 atmel,smc = <&hsmc>; 1117 reg = <0x10000000 0x10000000 1118 0x40000000 0x30000000>; 1119 ranges = <0x0 0x0 0x10000000 0x10000000 1120 0x1 0x0 0x40000000 0x10000000 1121 0x2 0x0 0x50000000 0x10000000 1122 0x3 0x0 0x60000000 0x10000000>; 1123 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 1124 status = "disabled"; 1125 1126 nand_controller: nand-controller { 1127 compatible = "atmel,sama5d3-nand-controller"; 1128 atmel,nfc-sram = <&nfc_sram>; 1129 atmel,nfc-io = <&nfc_io>; 1130 ecc-engine = <&pmecc>; 1131 #address-cells = <2>; 1132 #size-cells = <1>; 1133 ranges; 1134 status = "disabled"; 1135 }; 1136 }; 1137 1138 nfc_io: nfc-io@70000000 { 1139 compatible = "atmel,sama5d3-nfc-io", "syscon"; 1140 reg = <0x70000000 0x8000000>; 1141 }; 1142 }; 1143}; 1144