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/arkcompiler/runtime_core/libpandabase/utils/
Dregmask.h90 constexpr bool Test(size_t bit) const in Test() argument
92 ASSERT(bit < Size()); in Test()
93 return ((value_ >> static_cast<ValueType>(bit)) & 1U) != 0; in Test()
105 constexpr void Set(size_t bit) in Set() argument
107 ASSERT(bit < Size()); in Set()
108 value_ |= (1U << bit); in Set()
111 constexpr void Set(size_t bit, bool value) in Set() argument
113 ASSERT(bit < Size()); in Set()
115 Set(bit); in Set()
117 Reset(bit); in Set()
[all …]
/arkcompiler/runtime_core/docs/
D2022-08-18-isa-changelog.md20 8. We add 8-bit or 16-bit imm as inline cache slot for some specific opcodes.
26 We reuse the field 32-bit field `access_flags_` to encode Function Kind and Header index.
27 This will not introduce compatibility issue because the later 24-bit of `access_flags_` is unused i…
30 |<- 16-bit header index ->|<- 8-bit function kind ->|<- 8-bit original access flag ->|
39 As we use 16-bit to encode methodId, stringId and literalarrayId, the number of these Ids in one me…
45 3. In bytecode, we still use 16-bit literalarrayId rather than offset.
Dcode_metainfo.md53 Column width can't be greater than 32 bits, because `BitTableBuilder` class, that aims to build bit…
108 | TABLE_MASK | Bit mask of existing bit tables |
135 | METHOD_HI | Hi 32-bit part of the method pointer (actual only for jit) |
136 | METHOD_LOW | Low 32-bit part of the method pointer (actual only for jit) |
156 This is a Bitmap table, where column is a bit mask, that determines which CPU register holds a mana…
160 This is a Bitmap table, where column is a bit mask, that determines which stack slot holds a manage…
168 This is a Bitmap table, where column is a bit mask, that determines which virtual register is modif…
Dassembly_format.md28 …ating-point literals are prefixed with `0x`. They are first converted to a bit representation that…
206 | `u1` | Unsinged 1-bit integer number |
207 | `u8` | Unsigned 8-bit integer number |
208 | `i8` | Signed 8-bit integer number |
209 | `u16` | Unsigned 16-bit integer number |
210 | `i16` | Signed 16-bit integer number |
211 | `u32` | Unsigned 32-bit integer number |
212 | `i32` | Signed 32-bit integer number |
213 | `u64` | Unsigned 64-bit integer number |
214 | `i64` | Signed 64-bit integer number |
[all …]
Ddesign-of-interpreter.md162 to the objects on 32-bit and 64-bit architectures.
180 1. Although tagged virtual registers occupy more memory (especially on 64-bit architectures),
184 or `sizeof(double)` or `sizeof(void *)` on a 64-bit architecture (i.e. theoretical maximum
Daot.md47 therefore compiled Ark bytecode file must be bit by bit equal to the file loaded in runtime.
Dfile_format.md13 doesn't fit in 16-bit unsigned integer. It leads to application developer have to create several
24 But to achieve more compactness 16-bit indexes are used to refer classes, methods and fields in
74 | `uint8_t` | 8-bit unsigned integer value |
75 | `uint16_t` | 16-bit unsigned integer value |
76 | `uint32_t` | 32-bit little endian unsigned integer value. |
227 To address file structures using 16-bit indexes file is split into regions. Each region has class, …
667 … | `uint8_t[4]` | 4-byte bit pattern, zero-extended to the right, and interpreted as …
677 … | `uint8_t[8]` | 8-byte bit pattern, zero-extended to the right, and interpreted as …
Dmemory-management.md191 | Compressed bit (1 bit) |
198 If the compressed bit is 1, the string has a compressed payload - 8 bits for each element.
200 If the compressed bit is 0, the string has not been compressed - its payload consists of 16 bits el…
207 | String Hash | GC bit (1 bit) | Status (2 bits) | <--- Mark Word (32 bits)
Drationale-for-bytecode.md188 with say 64-bit integers. In this case, if we want to add two double-precision floating point
217 I.e. does it mean that if `adda reg1, reg2` operates only on 64-bit integers, registers `reg1`
/arkcompiler/runtime_core/compiler/docs/
Dinterface_inline_cache.md20 * must be 64bit system
27 Cache structure:（offset addr)/(class addr) 32bit/32bit
47 1. one cache is 64bit
51 5. why use 64bit?
52 because read and write 64bit is atomic, same `cache` maybe use at same time
55 1. `class addr` is just the point to a class, in ark runtime, class point is 32bit
63 because method* is 64bit, it must be indirectly stored,cache only have 32bit to use
100 because Method* is 8bit align, so Method* can be compressed. So the actual range we can store is:
Dreg_alloc_graph_coloring_doc.md19 …plementation was used alternative algorithm that is LexBFS. It uses little bit more compact data s…
47 …t node, and neighbor bias-colors (if any). To account this information two bit-sets are used respe…
50 …. On first phase neighbor busy bitset is scanned in loop for first not-set bit. On second phase se…
/arkcompiler/runtime_core/libpandabase/tests/
Dregmask_test.cpp61 void TestDistance(RegMask mask, size_t bit, size_t bits_before, size_t bits_after) in TestDistance() argument
63 ASSERT_EQ(mask.GetDistanceFromTail(bit), bits_before); in TestDistance()
64 ASSERT_EQ(mask.GetDistanceFromHead(bit), bits_after); in TestDistance()
/arkcompiler/runtime_core/tests/verifier-tests/
Dbug_2107_2.pa19 # Truncations discard all but N lowest-order bits, where N is the bit size of destination
39 # Load different values (objects, strings, types, 64-bit floating point values, 32-bit integer va…
Dbug_2107_1.pa37 # Load different values (objects, strings, types, 64-bit floating point values, 32-bit integer va…
Dbug_1834.pa35 stobj v0, R.fi64 # 64 bit field size!
/arkcompiler/runtime_core/tests/checked/
Dldarray_obj.pa38 # Second parameter is 32-bit, but here we call it with 64-bit
/arkcompiler/ets_runtime/ecmascript/
Dtagged_node.cpp85 void RBTreeNode::InOrderTraverse(JSThread *thread, const JSHandle<RBTreeNode> &treeNode, int bit, in InOrderTraverse() argument
90 InOrderTraverse(thread, leftChild, bit, nodeStruct); in InOrderTraverse()
95 if ((linkedNode->GetHash().GetInt() & bit) == 0) { in InOrderTraverse()
112 InOrderTraverse(thread, rightChild, bit, nodeStruct); in InOrderTraverse()
117 JSHandle<JSTaggedValue> nodeVa, int index, int bit) in Divide() argument
125 InOrderTraverse(thread, self, bit, nodeStruct); in Divide()
151 table->Set(thread, index + bit, hiRoot); in Divide()
153 table->Set(thread, index + bit, nodeStruct.higherHead); in Divide()
Dtagged_node.h130 JSHandle<JSTaggedValue> nodeVa, int index, int bit);
144 int bit, LinkedNodeStruct &nodeStruct);
Djs_bigint.cpp1486 int64_t bit = base::NumberHelper::DoubleToInt64(number.GetNumber()); in AsUintN() local
1487 if (bit == 0) { in AsUintN()
1493 JSHandle<BigInt> exponent = Uint64ToBigInt(thread, bit); in AsUintN()
1495 if (bit >= kMaxLengthBits && !bigint->GetSign()) { in AsUintN()
1508 int64_t bit = base::NumberHelper::DoubleToInt64(number.GetNumber()); in AsintN() local
1509 if (bit == 0) { in AsintN()
1515 JSHandle<BigInt> exp = Int64ToBigInt(thread, bit); in AsintN()
1516 JSHandle<BigInt> exponent = Int64ToBigInt(thread, bit - 1); in AsintN()
1518 if (bit >= kMaxLengthBits && !bigint->GetSign()) { in AsintN()
/arkcompiler/ets_runtime/ecmascript/builtins/tests/
Dbuiltins_bigint_test.cpp104 int bit = 64; // 64-bit in HWTEST_F_L0() local
109 ecmaRuntimeCallInfo->SetCallArg(0, JSTaggedValue(static_cast<int>(bit))); in HWTEST_F_L0()
128 int bit = 64; // 64-bit in HWTEST_F_L0() local
133 ecmaRuntimeCallInfo->SetCallArg(0, JSTaggedValue(static_cast<int>(bit))); in HWTEST_F_L0()
152 int bit = 64; // 64-bit in HWTEST_F_L0() local
157 ecmaRuntimeCallInfo->SetCallArg(0, JSTaggedValue(static_cast<int>(bit))); in HWTEST_F_L0()
176 int bit = 64; // 64-bit in HWTEST_F_L0() local
181 ecmaRuntimeCallInfo->SetCallArg(0, JSTaggedValue(static_cast<int>(bit))); in HWTEST_F_L0()
/arkcompiler/ets_frontend/merge_abc/
DHowToWriteProtoForAssemblyStuff.md70 |string | string | 一个字符串必须是UTF-8编码或者7-bit ASCII编码的文本
/arkcompiler/ets_runtime/ecmascript/compiler/
Dcircuit_ir_specification.md43 …r Circuit IR, and are determined by the opcode of gates. They describe the bit width of values, an…
45 …le bit vectors the value can be (e.g. `JS_ANY` `JS_BOOLEAN` `JS_NULL` `JS_UNDEFINED` `JS_NUMBER` `…
53 * The 31st bit is used to distinguish between MIR type and TS type, `0` means TS type, `1` means MI…
61 * In the case of MIR type, the 1st bit in GateType is used to indicate whether there are output val…
/arkcompiler/ets_frontend/ts2panda/templates/
Dirnodes.ts.erb245 // the least significant bit indicates vreg
246 // the second bit indicates src or dst
/arkcompiler/runtime_core/ldscripts/
Dpanda_test_asan.ld66 Default Linux/AArch64 (39-bit VMA) mapping:
73 Default Linux/AArch64 (42-bit VMA) mapping:
/arkcompiler/runtime_core/docs/bc_verification/
Dtypes_n_values.md6 like storage size, bit width, etc.

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