Searched refs:edges (Results 1 – 9 of 9) sorted by relevance
/arkcompiler/ets_runtime/ecmascript/dfx/hprof/ |
D | heap_snapshot_json_serializer.cpp | 127 const CList<Edge *> *edges = snapshot_->GetEdges(); in SerializeEdges() local 129 ASSERT(edges != nullptr); in SerializeEdges() 132 for (auto *edge : *edges) { in SerializeEdges() 141 if (i == edges->size() - 1) { // add comma at last the line in SerializeEdges()
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/arkcompiler/runtime_core/compiler/docs/ |
D | reg_alloc_graph_coloring_doc.md | 27 …edges that represent interference, it is built affinity edges of the graph. Affinity edges represe… 28 Output graph will be interference-graph G = {Nodes, IEdges, AEdges} – graph with 2 types of edges: … 41 …edges of IG form components known as Affinity-components. In best-case scenario all nodes in affin… 42 …h algorithm which is recursive call to DFS, until all nodes having affine edges are visited. Marke…
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D | cleanup_doc.md | 27 …edges between same blocks, but our way to store CFG edges don't support that. So, we have to inser…
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D | ir_builder.md | 102 # Add control flow edges between created basic blocks
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/arkcompiler/runtime_core/compiler/tests/ |
D | reg_alloc_interference_graph_test.cpp | 124 … ::std::pair<unsigned, unsigned> *edges, unsigned count, ArenaVector<unsigned> &peo, in BuildSubgraph() argument 131 auto x = edges[i].first; in BuildSubgraph() 132 auto y = edges[i].second; in BuildSubgraph()
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/arkcompiler/runtime_core/docs/ |
D | ir_format.md | 134 **BasicBlock** can not have more than one incoming or outgoing edges into the same block. 146 …e `Phi` instructions in block 2 with different inputs from those incoming edges. When there are no… 236 …alidated after Control Flow transformations: removing or adding blocks or edges between blocks. Al…
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D | doxygen.config | 2412 # root by following a path via at most 3 edges will be shown. Nodes that lay 2427 # badly anti-aliased labels on the edges of a graph (i.e. they become hard to
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/arkcompiler/ets_runtime/ecmascript/compiler/ |
D | circuit_ir_specification.md | 5 …](https://en.wikipedia.org/wiki/Logic_gate) are nodes, wires are directed edges. For every gate, i…
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/arkcompiler/ets_frontend/es2panda/test/compiler/js/ |
D | cocos_worker_test.js | 118631 D.edges = R; 119867 u.edges = this.getValue(e, "edges", null); 121621 if (null != this.edges) { 121622 e.edges = new Array(this.edges.length); 121623 t.Utils.arrayCopy(this.edges, 0, e.edges, 0, this.edges.length);
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