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Searched refs:vreg (Results 1 – 25 of 50) sorted by relevance

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/arkcompiler/ets_frontend/ts2panda/src/base/
DbuiltIn.ts34 let vreg = getVregisterCache(pandaGen, CacheList.HOLE);
37 new Sta(vreg)
42 let vreg = getVregisterCache(pandaGen, CacheList.NAN);
45 new Sta(vreg)
50 let vreg = getVregisterCache(pandaGen, CacheList.INFINITY);
53 new Sta(vreg)
58 let vreg = getVregisterCache(pandaGen, CacheList.GLOBAL);
61 new Sta(vreg)
66 let vreg = getVregisterCache(pandaGen, CacheList.UNDEFINED);
69 new Sta(vreg)
[all …]
DvregisterCache.ts67 this.vreg = undefined;
71 private vreg: VReg | undefined; property in CacheItem
77 if (!this.flag || !this.vreg) {
79 this.vreg = new VReg();
81 return this.vreg;
DbcGenUtil.ts136 export function loadAccumulator(vreg: VReg): IRNode {
137 return new Lda(vreg);
140 export function storeAccumulator(vreg: VReg): IRNode {
141 return new Sta(vreg);
/arkcompiler/runtime_core/compiler/optimizer/ir_builder/
Dinst_builder.cpp46 for (size_t vreg = 0; vreg < GetVRegsCount(); vreg++) { in UpdateDefsForCatch() local
48 defs_[current_bb_->GetId()][vreg] = catch_phi; in UpdateDefsForCatch()
60 for (size_t vreg = 0; vreg < GetVRegsCount(); vreg++) { in UpdateDefsForLoopHead() local
61 auto def_inst = pred_defs[vreg]; in UpdateDefsForLoopHead()
65 phi->SetLinearNumber(vreg); in UpdateDefsForLoopHead()
67 (*current_defs_)[vreg] = phi; in UpdateDefsForLoopHead()
68 COMPILER_LOG(DEBUG, IR_BUILDER) << "create Phi(id=" << phi->GetId() << ") for r" << vreg in UpdateDefsForLoopHead()
69 << "(def id=" << pred_defs[vreg]->GetId() << ")"; in UpdateDefsForLoopHead()
87 for (size_t vreg = 0; vreg < GetVRegsCount(); vreg++) { in UpdateDefs() local
99 value = defs_[pred_bb->GetId()][vreg]; in UpdateDefs()
[all …]
Dinst_builder.h54 for (size_t vreg = 0; vreg < GetVRegsCount(); vreg++) { variable
59 if (vreg == VREGS_AND_ARGS_COUNT) {
148 void UpdateDefinition(size_t vreg, Inst *inst) in UpdateDefinition() argument
150 ASSERT(vreg < current_defs_->size()); in UpdateDefinition()
151 COMPILER_LOG(DEBUG, IR_BUILDER) << "update def for r" << vreg << " from " in UpdateDefinition()
152 << ((*current_defs_)[vreg] != nullptr in UpdateDefinition()
153 ? std::to_string((*current_defs_)[vreg]->GetId()) in UpdateDefinition()
156 (*current_defs_)[vreg] = inst; in UpdateDefinition()
173 Inst *GetDefinition(size_t vreg) in GetDefinition() argument
175 ASSERT(vreg < current_defs_->size()); in GetDefinition()
[all …]
/arkcompiler/ets_frontend/ts2panda/src/
Dvariable.ts33 private vreg: VReg | undefined; property in Variable
43 this.vreg = undefined;
47 bindVreg(vreg: VReg): void {
48 this.vreg = vreg;
49 this.vreg.setTypeIndex(this.typeIndex);
50 this.vreg.setVariableName(this.name);
54 return this.vreg !== undefined;
58 if (!this.vreg) {
61 return this.vreg;
Dts2panda.ts312 let vreg = (inst.operands[0] as VReg).num;
314 if (vreg >= paraCount || arg < vregCount) {
318 handledSet.add(vreg);
324 let vreg = (inst.operands[0] as VReg).num;
325 if (vreg < locals.length && !handledSet.has(vreg)) {
326 typeIdx = locals[vreg].getTypeIndex();
328 handledSet.add(vreg);
382 typeRecord.forEach((vreg) => {
384 console.log("- vreg name:", vreg.getVariableName());
385 console.log("- vreg local num:", vreg.num);
[all …]
Dpandagen.ts432 let vreg = new VReg();
433 this.locals.push(vreg);
434 return vreg;
441 let vreg = this.allocLocalVreg();
442 v.bindVreg(vreg);
443 return vreg;
513 storeAccumulator(node: ts.Node | NodeKind, vreg: VReg): void {
514 this.add(node, storeAccumulator(vreg));
553 loadAccumulator(node: ts.Node | NodeKind, vreg: VReg): void {
554 this.add(node, loadAccumulator(vreg));
DregAllocator.ts44 allocIndexForVreg(vreg: VReg): void {
46 vreg.num = num;
/arkcompiler/ets_frontend/ts2panda/tests/
Dpandagen.test.ts32 let vreg = new VReg(); variable
33 pandaGen.storeAccumulator(ts.createNode(0), vreg);
36 new Sta(vreg)
/arkcompiler/ets_frontend/ts2panda/tests/types/
DtypeUtils.ts74 for (let vreg of generated) {
75 let name = vreg.getVariableName();
79 let vregMarker = "#" + vreg.num + "#" + vreg.getVariableName();
84 if (expectedMap.get(vregMarker) != vreg.getTypeIndex()) {
87 console.log("vreg type:", vreg.getTypeIndex());
/arkcompiler/runtime_core/compiler/tests/
Dcode_info_test.cpp65 for (auto vreg : list) { in EnumerateVRegs() local
66 callback(vreg); in EnumerateVRegs()
75 …merateVRegs(code_info, stack_map, -1, [&vregs_in_map](auto vreg) { vregs_in_map.push_back(vreg); }… in CompareVRegs() argument
78 [&vregs_in_map](auto vreg) { vregs_in_map.push_back(vreg); }); in CompareVRegs() argument
144 EnumerateVRegs(code_info, stack_map, -1, [&vregs, &index](auto vreg) { in TEST_F() argument
145 vreg.SetIndex(0); in TEST_F()
146 ASSERT_EQ(vreg, vregs[index++]); in TEST_F()
150 code_info.EnumerateStaticRoots(stack_map, [&mask, &vregs](auto vreg) -> bool { in TEST_F() argument
151 auto it = std::find(vregs.begin(), vregs.end(), vreg); in TEST_F()
Dgraph_comparator.h277 return i1.value == i2.value && i1.vreg == i2.vreg && i1.is_acc == i2.is_acc; in Compare()
Dcompiler_inst_test.cpp234 uint16_t vreg = 2; in __anon7b7a1abf0502() local
245 save_state_inst->AppendImmediate(imm, vreg, DataType::Type::INT64, isAcc); in __anon7b7a1abf0502()
Ddump_test.cpp913 uint16_t vreg = 2; // 2: random number in __anonb8e9e89d1202() local
926 saveState->AppendImmediate(immediate, vreg, DataType::Type::INT64, isAcc); in __anonb8e9e89d1202()
/arkcompiler/runtime_core/docs/
Dcode_metainfo.md10 we call the runtime, we can save information in which stack slot specific vreg is live.
144 vreg 0
145 vreg 1 ; method 0: CodeInfoHeader::VREGS_COUNT=3
146 vreg 2
148 vreg 3 ; method 1: InlineInfo::VREGS_COUNT=1
150 vreg 4
151 vreg 5 ; method 3: InlineInfo::VREGS_COUNT=2
182 - **Location** - where vreg is stored: stack slot, CPU register or constant.
184 - **IsAccumulator** - whethre vreg is accumulator.
Drationale-for-bytecode.md153 | operation code | vreg 1 | vreg 2 |
162 | operation code | vreg 1 | vreg 2 |
/arkcompiler/ets_runtime/ecmascript/compiler/
Dframe_states.cpp361 auto vreg = std::get<VirtualRegister>(bytecodeInfo.inputs.at(0)).GetId(); in ComputeLiveOutBC() local
363 gate = builder_->ResolveDef(bbId, index, vreg, false); in ComputeLiveOutBC()
365 UpdateVirtualRegister(vreg, gate); in ComputeLiveOutBC()
393 auto vreg = std::get<VirtualRegister>(in).GetId(); in ComputeLiveOutBC() local
395 UpdateVirtualRegister(vreg, def); in ComputeLiveOutBC()
573 auto vreg = static_cast<size_t>(gateAcc_.GetVirtualRegisterIndex(*it)); in UpdateVirtualRegistersOfResume() local
574 UpdateVirtualRegister(vreg, Circuit::NullGate()); in UpdateVirtualRegistersOfResume()
Dbytecode_circuit_builder.cpp414 for (const auto &vreg: bytecodeInfo.vregOut) { in InsertPhi() local
415 defsitesInfo[vreg].insert(bb.id); in InsertPhi()
468 for (const auto &vreg: bytecodeInfo.vregOut) { in InsertExceptionPhi() local
469 vregs.insert(vreg); in InsertExceptionPhi()
474 for (auto &vreg : vregs) { in InsertExceptionPhi() local
475 defsitesInfo[vreg].insert(bb.catchs.at(0)->id); in InsertExceptionPhi()
476 bb.catchs.at(0)->phi.insert(vreg); in InsertExceptionPhi()
/arkcompiler/ets_frontend/es2panda/binder/
Dvariable.h138 void BindVReg(compiler::VReg vreg) in BindVReg() argument
141 vreg_ = vreg; in BindVReg()
/arkcompiler/runtime_core/compiler/optimizer/ir/
Dinst.cpp380 void SaveStateInst::AppendImmediate(uint64_t imm, uint16_t vreg, DataType::Type type, bool is_acc) in AppendImmediate() argument
386 immediates_->emplace_back(SaveStateImm {imm, vreg, type, is_acc}); in AppendImmediate()
/arkcompiler/ets_frontend/es2panda/compiler/core/
Dpandagen.h290 void StoreAccumulator(const ir::AstNode *node, VReg vreg);
291 void StoreAccumulatorWithType(const ir::AstNode *node, int64_t typeIndex, VReg vreg);
/arkcompiler/runtime_core/libpandafile/templates/
Dbytecode_instruction-inl_gen.h.erb186 static_assert(HasVReg(format, idx), "Instruction doesn't have vreg operand with such index");
213 ASSERT_PRINT(HasVReg(format, idx), "Instruction doesn't have vreg operand with such index");
/arkcompiler/runtime_core/compiler/docs/
Dir_builder.md57 - if has destination, update virtual register definition in the vreg map
/arkcompiler/runtime_core/disassembler/
Ddisassembler.cpp1520 uint32_t vreg = variable_info.reg_number; in SerializeLocalVariableTable() local
1522 if (vreg < first_arg_reg) { in SerializeLocalVariableTable()
1523 reg_stream << 'v' << vreg; in SerializeLocalVariableTable()
1525 reg_stream << 'a' << vreg - first_arg_reg; in SerializeLocalVariableTable()

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