| /drivers/hdf_core/adapter/khdf/linux/platform/mipi_dsi/ |
| D | mipi_tx_reg.h | 28 } bits; member
41 } bits; member
53 } bits; member
67 } bits; member
81 } bits; member
97 } bits; member
109 } bits; member
121 } bits; member
147 } bits; member
159 } bits; member
[all …]
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| D | mipi_tx_hi35xx.c | 438 phyCtx->hactDet = g_mipiTxRegsVa->HORI0_DET.bits.hact_det; in MipiTxDrvGetDevStatus()
439 phyCtx->hallDet = g_mipiTxRegsVa->HORI0_DET.bits.hline_det; in MipiTxDrvGetDevStatus()
440 phyCtx->hbpDet = g_mipiTxRegsVa->HORI1_DET.bits.hbp_det; in MipiTxDrvGetDevStatus()
441 phyCtx->hsaDet = g_mipiTxRegsVa->HORI1_DET.bits.hsa_det; in MipiTxDrvGetDevStatus()
442 phyCtx->vactDet = g_mipiTxRegsVa->VERT_DET.bits.vact_det; in MipiTxDrvGetDevStatus()
443 phyCtx->vallDet = g_mipiTxRegsVa->VERT_DET.bits.vall_det; in MipiTxDrvGetDevStatus()
444 phyCtx->vsaDet = g_mipiTxRegsVa->VSA_DET.bits.vsa_det; in MipiTxDrvGetDevStatus()
616 } while (cmdPktStatus.bits.gen_cmd_empty == 0); in MipiTxWaitCmdFifoEmpty()
634 } while (cmdPktStatus.bits.gen_pld_w_empty == 0); in MipiTxWaitWriteFifoEmpty()
655 } while (cmdPktStatus.bits.gen_pld_w_full == 1); in MipiTxWaitWriteFifoNotFull()
[all …]
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| /drivers/hdf_core/framework/support/platform/include/hdmi/ |
| D | hdmi_scdc.h | 75 } bits; member
99 } bits; member
111 } bits; member
127 } bits; member
141 } bits; member
158 } bits; member
192 } bits; member
212 } bits; member
224 } bits; member
237 } bits; member
[all …]
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| D | hdmi_infoframe.h | 395 } bits; member
404 } bits; member
414 } bits; member
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| /drivers/hdf_core/framework/core/sec/include/ |
| D | hdf_sec.h | 35 #define HDF_DECLARE_BITMAP(name, bits) \ argument
36 uint64_t name[HDF_BITS_TO_LONGS(bits)]
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| /drivers/hdf_core/framework/model/storage/src/mmc/ |
| D | mmc_protocol.c | 509 if (dev->state.bits.blockAddr == 0) { in MmcSendEraseStartCmd()
538 if (dev->state.bits.blockAddr == 0) { in MmcSendEraseEndCmd()
658 if (mmc->state.bits.blockAddr == 0) { in MmcSetupReadWriteBlocksCmd()
675 if ((info->sectors > 1) && (mmc->cntlr->caps.bits.cmdStop > 0)) { in MmcSetupReadWriteBlocksCmd()
825 cntlr->curDev->state.bits.removable = 1; in EmmcDecodeCid()
844 emmcDev->mmc.state.bits.blockAddr = 1; in EmmcDecodeExtCsdSector()
931 if (emmcDev->mmc.state.bits.blockAddr == 1) { in EmmcDecodeExtCsdEnhanceArea()
1056 if (emmcDev->mmc.state.bits.blockAddr > 0) { in EmmcSetBlockCapacity()
1084 if (cntlr->caps2.bits.hs200Sdr1v2 == 1 && (cardType & EMMC_EXT_CSD_CARD_TYPE_SDR_1_2V) > 0) { in EmmcSwitchVoltage()
1087 if (cntlr->caps2.bits.hs200Sdr1v8 && (cardType & EMMC_EXT_CSD_CARD_TYPE_SDR_1_8V) > 0) { in EmmcSwitchVoltage()
[all …]
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| D | mmc_core.c | 139 if (cntlr->curDev != NULL && cntlr->curDev->state.bits.present > 0) { in MmcCntlrSdioRescanHandle()
429 if (cntlr->caps.bits.nonremovable > 0) { in MmcCntlrDevPlugged()
464 if (cntlr->ocrDef.bits.vdd1v65To1v95 == 0) { in MmcCntlrSelectWorkVoltage()
465 ocr->bits.vdd1v65To1v95 = 0; in MmcCntlrSelectWorkVoltage()
525 if (cntlr->ops->hardwareReset != NULL && cntlr->caps.bits.hardwareReset > 0) { in MmcCntlrPowerUp()
606 if (cntlr->caps.bits.uhsSdr12 > 0 || in MmcCntlrSupportUhs()
607 cntlr->caps.bits.uhsSdr25 > 0 || in MmcCntlrSupportUhs()
608 cntlr->caps.bits.uhsSdr50 > 0 || in MmcCntlrSupportUhs()
609 cntlr->caps.bits.uhsSdr104 > 0 || in MmcCntlrSupportUhs()
610 cntlr->caps.bits.uhsDdr50 > 0) { in MmcCntlrSupportUhs()
[all …]
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| D | mmc_block.c | 44 mb->removable = (mmcDevice->state.bits.removable == 0) ? false : true; in MmcBlockInit()
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| D | mmc_sdio.c | 272 info->funcInfo.irqCap = cntlr->caps.bits.sdioIrq; in SdioDeviceDefaultGetCommonInfo()
397 if (cntlr->caps.bits.sdioIrq > 0) { in SdioDeviceDefaultClaimIrq()
423 if (cntlr->caps.bits.sdioIrq > 0 && cntlr->ops != NULL && cntlr->ops->setSdioIrq != NULL) { in SdioDeviceDefaultReleaseIrq()
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| /drivers/hdf_core/framework/test/unittest/platform/common/ |
| D | spi_test.c | 168 static int32_t SpiCmpMemByBits(uint8_t *wbuf, uint8_t *rbuf, uint32_t len, uint8_t bits) in SpiCmpMemByBits() argument
174 if (bits < SPI_TEST_4BITS) { in SpiCmpMemByBits()
175 bits = SPI_TEST_4BITS; in SpiCmpMemByBits()
176 } else if (bits > SPI_TEST_16BITS) { in SpiCmpMemByBits()
177 bits = SPI_TEST_16BITS; in SpiCmpMemByBits()
181 if (bits <= SPI_TEST_8BITS) { in SpiCmpMemByBits()
182 vw = *((uint8_t *)(wbuf + i)) & (~(0xFFFF << bits)); in SpiCmpMemByBits()
183 vr = *((uint8_t *)(rbuf + i)) & (~(0xFFFF << bits)); in SpiCmpMemByBits()
185 vw = *((uint16_t *)(wbuf + i)) & (~(0xFFFF << bits)); in SpiCmpMemByBits()
186 vr = *((uint16_t *)(rbuf + i)) & (~(0xFFFF << bits)); in SpiCmpMemByBits()
[all …]
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| /drivers/hdf_core/framework/support/platform/src/hdmi/ |
| D | hdmi_core.c | 48 if (cntlr->cap.baseCap.bits.cec == 0) { in HdmiCecInit()
116 if (cntlr->cap.baseCap.bits.frl == 0) { in HdmiFrlInit()
150 if (cntlr->cap.baseCap.bits.hdcp == 0) { in HdmiHdcpInit()
188 if (cntlr->cap.baseCap.bits.hdr == 0) { in HdmiHdrInit()
241 if (cntlr->cap.baseCap.bits.scdc == 0) { in HdmiScdcInit()
567 if (HdmiFrlSupport(cntlr->frl) == true && cntlr->cap.baseCap.bits.frl > 0) { in HdmiCntlrModeSelect()
571 if (cntlr->cap.baseCap.bits.scdc > 0) { in HdmiCntlrModeSelect()
584 if (cntlr->cap.baseCap.bits.scdc > 0 && HdmiEdidScdcSupport(cntlr->hdmi) == true) { in HdmiCntlrModeSelect()
722 if (cntlr->cap.baseCap.bits.hdr > 0 && cntlr->cap.baseCap.bits.frl > 0) { in HdmiCntlrStart()
850 if ((sinkCap->colorSpace.rgb444 && cap->bits.rgb444) == false) { in HdmiColorSpaceCheck()
[all …]
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| D | hdmi_frl.c | 142 cfg.bits.frlRate = frl->info.curFrlRate; in HdmiFrlSetTrainRate()
143 cfg.bits.ffeLevels = HDMI_FRL_TXFFE_MODE_0; in HdmiFrlSetTrainRate()
156 cntlr->cap.baseCap.bits.hdmi21 == 0 || in HdmiFrlCheckFrlCapability()
157 cntlr->cap.baseCap.bits.frl == 0 || in HdmiFrlCheckFrlCapability()
276 if ((cfg.bits.frlMax > 0 && cfg.bits.dscFrlMax == 0) || in HdmiFrlIsCtsMode()
277 (cfg.bits.frlMax == 0 && cfg.bits.dscFrlMax > 0)) { in HdmiFrlIsCtsMode()
420 if (testCfg.bits.fltNoTimeout > 0) { in HdmiFrlConfigAndStartTraining()
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| D | hdmi_scdc.c | 228 cfg.bits.scramblingEnable = 1; in HdmiScdcScrambleSet()
231 cfg.bits.tmdsBitClockRatio = 1; in HdmiScdcScrambleSet()
256 scramble->sinkScramble = (status.bits.scramblingStatus ? true : false); in HdmiScdcScrambleGet()
263 scramble->tmdsBitClockRatio40 = (cfg.bits.tmdsBitClockRatio ? true : false); in HdmiScdcScrambleGet()
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| /drivers/hdf_core/framework/model/storage/include/mmc/ |
| D | mmc_caps.h | 75 } bits; member
95 } bits; member
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| D | mmc_corex.h | 223 } bits; member
254 return (mmc != NULL && mmc->state.bits.present); in MmcDeviceIsPresent()
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| D | mmc_protocol.h | 203 } bits; member
818 } bits; member
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| /drivers/hdf_core/framework/sample/platform/uart/src/ |
| D | uart_pl011_sample.c | 11 void UartPl011SetLcrBits(struct UartRegisterMap *regMap, uint32_t bits) in UartPl011SetLcrBits() argument
16 regMap->lcr |= (bits); in UartPl011SetLcrBits()
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| /drivers/interface/location/lpfence/cellbatching/v1_0/ |
| D | CellbatchingTypes.idl | 75 /** Lower-order 32 bits of the timestamp. */
77 /** High-order 32 bits of the timestamp. */
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| /drivers/peripheral/codec/image/vdi/ |
| D | codec_jpeg_vdi.h | 58 std::vector<uint8_t> bits; member
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| /drivers/peripheral/codec/test/demo/jpeg/src/ |
| D | codec_jpeg_helper.cpp | 241 …auto ret = memcpy_s(buffer + curPos, table[i].bits.size(), table[i].bits.data(), table[i].bits.siz… in JpegDhtAssemble()
248 curPos += table[i].bits.size(); in JpegDhtAssemble()
535 table.bits.push_back(data); in DessambleDht()
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| /drivers/peripheral/light/ |
| D | README.md | 68 … most significant bit indicates the color. Bits16–31 for red, bits 8–15 for green, and bits 0–7 fo…
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| /drivers/hdf_core/framework/sample/platform/uart/include/ |
| D | uart_pl011_sample.h | 208 void UartPl011SetLcrBits(struct UartRegisterMap *regMap, uint32_t bits);
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| /drivers/interface/codec/image/v1_0/ |
| D | CodecImageType.idl | 120 unsigned char[] bits; /**< Bits value, bits[0] is unused. */
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| /drivers/interface/audio/v1_0/ |
| D | AudioTypes.idl | 141 /* 8 bits */
146 /* 16 bits */
151 /* 24 bits */
156 /* 32 bits */
161 /* 64 bits */
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| /drivers/interface/location/lpfence/geofence/v1_0/ |
| D | GeofenceTypes.idl | 259 /** Lower-order 32 bits of the timestamp. */
261 /** High-order 32 bits of the timestamp. */
|