Home
last modified time | relevance | path

Searched refs:g_gpioIrqCfg (Results 1 – 3 of 3) sorted by relevance

/drivers/hdf_core/adapter/platform/gpio/
Dgpio_wm.c67 enum tls_gpio_irq_trig g_gpioIrqCfg[WM_IO_MAX_GPIO_PIN_NUM] = {0}; enum
193 g_gpioIrqCfg[wmGpio] = WM_GPIO_IRQ_TRIG_RISING_EDGE; in GpioDevSetIrq()
196 g_gpioIrqCfg[wmGpio] = WM_GPIO_IRQ_TRIG_FALLING_EDGE; in GpioDevSetIrq()
199 g_gpioIrqCfg[wmGpio] = WM_GPIO_IRQ_TRIG_HIGH_LEVEL; in GpioDevSetIrq()
202 g_gpioIrqCfg[wmGpio] = WM_GPIO_IRQ_TRIG_LOW_LEVEL; in GpioDevSetIrq()
237 tls_gpio_irq_enable((enum tls_io_name)wmGpio, g_gpioIrqCfg[wmGpio]); in GpioDevEnableIrq()
Dgpio_bes.c75 static struct HAL_GPIO_IRQ_CFG_T g_gpioIrqCfg[HAL_GPIO_PIN_LED_NUM] = {0}; variable
425 g_gpioIrqCfg[pin].irq_type = HAL_GPIO_IRQ_TYPE_EDGE_SENSITIVE;
427 g_gpioIrqCfg[pin].irq_type = HAL_GPIO_IRQ_TYPE_LEVEL_SENSITIVE;
433 g_gpioIrqCfg[pin].irq_polarity = mode;
464 gpioCfg.irq_polarity = g_gpioIrqCfg[(enum HAL_GPIO_PIN_T)halGpio].irq_polarity;
466 gpioCfg.irq_type = g_gpioIrqCfg[(enum HAL_GPIO_PIN_T)halGpio].irq_type;
467 g_gpioIrqCfg[halGpio] = gpioCfg;
Dgpio_asr.c76 static asr_gpio_irq_trigger_t g_gpioIrqCfg[ASR_GPIO_TOTAL_NUM] = {0}; variable
189 g_gpioIrqCfg[gpio] = (asr_gpio_config_t)mode; in GpioDevSetIrq()
223 asr_gpio_enable_irq(dev, g_gpioIrqCfg[gpio], OemGpioIrqHdl, (void *)gpio); in GpioDevEnableIrq()