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/kernel/linux/linux-5.10/drivers/staging/comedi/drivers/ni_routing/ni_route_values/
Dni_mseries.c57 [B(NI_PFI(0))] = {
58 [B(TRIGGER_LINE(0))] = I(18),
59 [B(TRIGGER_LINE(1))] = I(19),
60 [B(TRIGGER_LINE(2))] = I(20),
61 [B(TRIGGER_LINE(3))] = I(21),
62 [B(TRIGGER_LINE(4))] = I(22),
63 [B(TRIGGER_LINE(5))] = I(23),
64 [B(TRIGGER_LINE(6))] = I(24),
65 [B(TRIGGER_LINE(7))] = I(25),
66 [B(NI_CtrSource(0))] = I(9),
[all …]
Dni_eseries.c54 [B(NI_PFI(0))] = {
55 [B(NI_AI_StartTrigger)] = I(NI_PFI_OUTPUT_AI_START1),
57 [B(NI_PFI(1))] = {
58 [B(NI_AI_ReferenceTrigger)] = I(NI_PFI_OUTPUT_AI_START2),
60 [B(NI_PFI(2))] = {
61 [B(NI_AI_ConvertClock)] = I(NI_PFI_OUTPUT_AI_CONVERT),
63 [B(NI_PFI(3))] = {
64 [B(NI_CtrSource(1))] = I(NI_PFI_OUTPUT_G_SRC1),
66 [B(NI_PFI(4))] = {
67 [B(NI_CtrGate(1))] = I(NI_PFI_OUTPUT_G_GATE1),
[all …]
Dni_660x.c49 [B(NI_PFI(8))] = {
50 [B(NI_CtrInternalOutput(7))] = I(1),
52 [B(NI_PFI(10))] = {
53 [B(NI_CtrGate(7))] = I(1),
55 [B(NI_PFI(11))] = {
56 [B(NI_CtrSource(7))] = I(1),
58 [B(NI_PFI(12))] = {
59 [B(NI_CtrInternalOutput(6))] = I(1),
61 [B(NI_PFI(14))] = {
62 [B(NI_CtrGate(6))] = I(1),
[all …]
/kernel/linux/linux-5.10/lib/
Dsha1.c56 #define SHA_ROUND(t, input, fn, constant, A, B, C, D, E) do { \ argument
59 B = ror32(B, 2); \
60 TEMP = E; E = D; D = C; C = B; B = A; A = TEMP; } while (0)
62 #define T_0_15(t, A, B, C, D, E) SHA_ROUND(t, SHA_SRC, (((C^D)&B)^D) , 0x5a827999, A, B, C, D, E ) argument
63 #define T_16_19(t, A, B, C, D, E) SHA_ROUND(t, SHA_MIX, (((C^D)&B)^D) , 0x5a827999, A, B, C, D, E ) argument
64 #define T_20_39(t, A, B, C, D, E) SHA_ROUND(t, SHA_MIX, (B^C^D) , 0x6ed9eba1, A, B, C, D, E ) argument
65 #define T_40_59(t, A, B, C, D, E) SHA_ROUND(t, SHA_MIX, ((B&C)+(D&(B^C))) , 0x8f1bbcdc, A, B, C, D,… argument
66 #define T_60_79(t, A, B, C, D, E) SHA_ROUND(t, SHA_MIX, (B^C^D) , 0xca62c1d6, A, B, C, D, E ) argument
88 __u32 A, B, C, D, E; in sha1_transform() local
92 B = digest[1]; in sha1_transform()
[all …]
/kernel/linux/linux-5.10/drivers/staging/comedi/drivers/
Dni_routes.c167 if (RVi(rv, B(src), B(dest))) in ni_count_valid_routes()
171 (RVi(rv, B(src), B(NI_RGOUT0)) || in ni_count_valid_routes()
172 RVi(rv, B(src), B(NI_RTSI_BRD(0))) || in ni_count_valid_routes()
173 RVi(rv, B(src), B(NI_RTSI_BRD(1))) || in ni_count_valid_routes()
174 RVi(rv, B(src), B(NI_RTSI_BRD(2))) || in ni_count_valid_routes()
175 RVi(rv, B(src), B(NI_RTSI_BRD(3))))) { in ni_count_valid_routes()
222 if (RVi(rv, B(src), B(dest))) in ni_get_valid_routes()
226 (RVi(rv, B(src), B(NI_RGOUT0)) || in ni_get_valid_routes()
227 RVi(rv, B(src), B(NI_RTSI_BRD(0))) || in ni_get_valid_routes()
228 RVi(rv, B(src), B(NI_RTSI_BRD(1))) || in ni_get_valid_routes()
[all …]
/kernel/linux/linux-5.10/scripts/coccinelle/misc/
Dboolconv.cocci19 expression A, B;
24 A == B
26 A != B
28 A > B
30 A < B
32 A >= B
34 A <= B
36 A && B
38 A || B
47 expression A, B;
[all …]
Dexcluded_middle.cocci3 /// Condition !A || A && B is equivalent to !A || B.
15 expression A, B;
19 * !A || (A &&@p B)
22 expression A, B;
26 - (A && B)
27 + B
33 coccilib.report.print_report(p[0], "WARNING !A || A && B is equivalent to !A || B")
39 coccilib.org.print_todo(p[0], "WARNING !A || A && B is equivalent to !A || B")
/kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/
Dpixfmt-srggb10-ipu3.rst33 - B\ :sub:`0000low`
36 B\ :sub:`0000high`\ (bits 1--0)
37 - B\ :sub:`0002low`\ (bits 7--4)
42 B\ :sub:`0002high`\ (bits 5--0)
45 - B\ :sub:`0004low`
48 B\ :sub:`0004high`\ (bits 1--0)
49 - B\ :sub:`0006low`\ (bits 7--4)
55 B\ :sub:`0006high`\ (bits 5--0)
57 - B\ :sub:`0008low`
60 B\ :sub:`0008high`\ (bits 1--0)
[all …]
Dpixfmt-meta-vsp1-hgo.rst31 - In *64 bins maximum mode*, the HGO operates on the maximum of the (R, G, B)
36 - In *256 bins maximum mode*, the HGO operates on the maximum of the (R, G, B)
67 - B/Cb/V max [7:0]
69 - B/Cb/V min [7:0]
75 - :cspan:`4` B/Cb/V sum [31:0]
89 - :cspan:`4` B/Cb/V bin 0 [31:0]
93 - :cspan:`4` B/Cb/V bin 63 [31:0]
108 - max(R,G,B) max [7:0]
110 - max(R,G,B) min [7:0]
112 - :cspan:`4` max(R,G,B) sum [31:0]
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/selftests/
Di915_sw_fence.c98 struct i915_sw_fence *A, *B, *C; in test_dag() local
114 B = alloc_fence(); in test_dag()
115 if (!B) { in test_dag()
120 i915_sw_fence_await_sw_fence_gfp(A, B, GFP_KERNEL); in test_dag()
121 if (i915_sw_fence_await_sw_fence_gfp(B, A, GFP_KERNEL) != -EINVAL) { in test_dag()
132 if (i915_sw_fence_await_sw_fence_gfp(B, C, GFP_KERNEL) == -EINVAL) { in test_dag()
136 if (i915_sw_fence_await_sw_fence_gfp(C, B, GFP_KERNEL) != -EINVAL) { in test_dag()
150 i915_sw_fence_commit(B); in test_dag()
158 if (!i915_sw_fence_done(B)) { in test_dag()
169 free_fence(B); in test_dag()
[all …]
/kernel/linux/linux-5.10/Documentation/translations/ko_KR/
Dmemory-barriers.txt181 { A == 1; B == 2 }
182 A = 3; x = B;
183 B = 4; y = A;
188 STORE A=3, STORE B=4, y=LOAD A->3, x=LOAD B->4
189 STORE A=3, STORE B=4, x=LOAD B->4, y=LOAD A->3
190 STORE A=3, y=LOAD A->3, STORE B=4, x=LOAD B->4
191 STORE A=3, y=LOAD A->3, x=LOAD B->2, STORE B=4
192 STORE A=3, x=LOAD B->2, STORE B=4, y=LOAD A->3
193 STORE A=3, x=LOAD B->2, y=LOAD A->3, STORE B=4
194 STORE B=4, STORE A=3, y=LOAD A->3, x=LOAD B->4
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-omap1/
Dmux.c121 MUX_CFG("USB2_SUSP", B, 3, 1, 2, 17, 0, NA, 0, 1)
122 MUX_CFG("USB2_VP", B, 6, 1, 2, 18, 0, NA, 0, 1)
123 MUX_CFG("USB2_TXEN", B, 9, 1, 2, 19, 0, NA, 0, 1)
172 MUX_CFG("BALLOUT_V8_ARMIO3", B, 18, 0, 2, 25, 1, NA, 0, 1)
176 MUX_CFG("W8_1610_MMC2_DAT0", B, 21, 6, 2, 23, 1, 2, 1, 1)
177 MUX_CFG("V8_1610_MMC2_DAT1", B, 27, 6, 2, 25, 1, 2, 1, 1)
179 MUX_CFG("R10_1610_MMC2_DAT3", B, 18, 6, 2, 22, 1, 2, 1, 1)
180 MUX_CFG("Y10_1610_MMC2_CLK", B, 3, 6, 2, 17, 0, 2, 0, 1)
181 MUX_CFG("Y8_1610_MMC2_CMD", B, 24, 6, 2, 24, 1, 2, 1, 1)
182 MUX_CFG("V9_1610_MMC2_CMDDIR", B, 12, 6, 2, 20, 0, 2, 1, 1)
[all …]
/kernel/linux/linux-5.10/arch/x86/crypto/
Dsha1_ssse3_asm.S114 mov 4(HASH_PTR), B
127 RR F1,A,B,C,D,E,0
128 RR F1,D,E,A,B,C,2
129 RR F1,B,C,D,E,A,4
130 RR F1,E,A,B,C,D,6
131 RR F1,C,D,E,A,B,8
133 RR F1,A,B,C,D,E,10
134 RR F1,D,E,A,B,C,12
135 RR F1,B,C,D,E,A,14
136 RR F1,E,A,B,C,D,16
[all …]
/kernel/linux/linux-5.10/tools/testing/selftests/netfilter/
Dnft_concat_range.sh435 ip netns add B
439 ip link set veth_b netns B
441 ip -n B link set veth_b up
450 ip -n B route add default dev veth_b
452 ip -6 -n B addr add fe80::2/64 dev veth_b nodad
453 ip -6 -n B addr add 2001:db8::2/64 dev veth_b nodad
454 ip -6 -n B route add default dev veth_b
456 B() { function
457 ip netns exec B "$@" >/dev/null 2>&1
490 B ping -c1 -W1 "${dst_addr4}" >/dev/null 2>&1
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dat91sam9x5_macb1.dtsi19 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */
20 AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */
21 AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */
22 AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
23 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
24 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
25 AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */
26 AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */
27 AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
28 AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */
Dstm32f7-pinctrl.dtsi160 pinmux = <STM32_PINMUX('B', 7, AF7)>; /* USART1_RX */
167 pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1 SDA */
168 <STM32_PINMUX('B', 8, AF4)>; /* I2C1 SCL */
182 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
183 <STM32_PINMUX('B', 1, AF10)>, /* OTG_HS_ULPI_D2 */
184 <STM32_PINMUX('B', 10, AF10)>, /* OTG_HS_ULPI_D3 */
185 <STM32_PINMUX('B', 11, AF10)>, /* OTG_HS_ULPI_D4 */
186 <STM32_PINMUX('B', 12, AF10)>, /* OTG_HS_ULPI_D5 */
187 <STM32_PINMUX('B', 13, AF10)>, /* OTG_HS_ULPI_D6 */
188 <STM32_PINMUX('B', 5, AF10)>; /* OTG_HS_ULPI_D7 */
[all …]
Dstm32f4-pinctrl.dtsi181 pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
187 pinmux = <STM32_PINMUX('B', 11, AF7)>; /* USART3_RX */
205 pinmux = <STM32_PINMUX('B', 12, AF12)>, /* OTG_HS_ID */
206 <STM32_PINMUX('B', 14, AF12)>, /* OTG_HS_DM */
207 <STM32_PINMUX('B', 15, AF12)>; /* OTG_HS_DP */
221 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
222 <STM32_PINMUX('B', 1, AF10)>, /* OTG_HS_ULPI_D2 */
223 <STM32_PINMUX('B', 10, AF10)>, /* OTG_HS_ULPI_D3 */
224 <STM32_PINMUX('B', 11, AF10)>, /* OTG_HS_ULPI_D4 */
225 <STM32_PINMUX('B', 12, AF10)>, /* OTG_HS_ULPI_D5 */
[all …]
/kernel/linux/linux-5.10/Documentation/usb/
Dchipidea.rst39 is micro B plug.
41 The A-device(with micro A plug inserted) should enumerate B-device.
45 On B-device::
49 B-device should take host role and enumerate A-device.
53 On B-device::
57 or, by introducing HNP polling, B-Host can know when A-peripheral wish
59 side by answering the polling from B-Host, this can be done on A-device::
63 A-device should switch back to host and enumerate B-device.
65 5) Remove B-device(unplug micro B plug) and insert again in 10 seconds,
66 A-device should enumerate B-device again.
[all …]
/kernel/linux/linux-5.10/Documentation/translations/zh_CN/
Dio_ordering.txt41 CPU B: spin_lock_irqsave(&dev_lock, flags)
42 CPU B: val = readl(my_status);
43 CPU B: ...
44 CPU B: writel(newval2, ring_ptr);
45 CPU B: spin_unlock_irqrestore(&dev_lock, flags)
59 CPU B: spin_lock_irqsave(&dev_lock, flags)
60 CPU B: val = readl(my_status);
61 CPU B: ...
62 CPU B: writel(newval2, ring_ptr);
63 CPU B: (void)readl(safe_register); /* 配置寄存器?*/
[all …]
/kernel/linux/linux-5.10/drivers/macintosh/
Dvia-cuda.c37 #define B 0 /* B-side data */ macro
108 out_8(&via[B], in_8(&via[B]) | TIP); in assert_TIP()
110 out_8(&via[B], in_8(&via[B]) & ~TIP); in assert_TIP()
117 out_8(&via[B], in_8(&via[B]) | TIP | TACK); in assert_TIP_and_TACK()
119 out_8(&via[B], in_8(&via[B]) & ~(TIP | TACK)); in assert_TIP_and_TACK()
126 out_8(&via[B], in_8(&via[B]) | TACK); in assert_TACK()
128 out_8(&via[B], in_8(&via[B]) & ~TACK); in assert_TACK()
133 out_8(&via[B], in_8(&via[B]) ^ TACK); in toggle_TACK()
140 out_8(&via[B], in_8(&via[B]) & ~TACK); in negate_TACK()
142 out_8(&via[B], in_8(&via[B]) | TACK); in negate_TACK()
[all …]
Dvia-macii.c43 #define B 0 /* B-side data */ macro
174 via[B] |= ST_IDLE; in macii_init_via()
345 via[B] = (via[B] & ~ST_MASK) | ST_CMD; in macii_start()
390 status = via[B] & (ST_MASK | CTLR_IRQ); in macii_interrupt()
418 via[B] = (via[B] & ~ST_MASK) | ST_EVEN; in macii_interrupt()
494 if ((via[B] & ST_MASK) == ST_CMD) { in macii_interrupt()
496 via[B] = (via[B] & ~ST_MASK) | ST_EVEN; in macii_interrupt()
499 via[B] ^= ST_MASK; in macii_interrupt()
543 via[B] ^= ST_MASK; in macii_interrupt()
560 via[B] = (via[B] & ~ST_MASK) | ST_IDLE; in macii_interrupt()
/kernel/linux/linux-5.10/drivers/staging/comedi/drivers/tests/
Dni_routes_test.c29 #define B(x) ((x) - NI_NAMES_BASE) macro
136 [B(NI_RGOUT0)] = {[B(rgout0_src0)] = V(0),
137 [B(rgout0_src1)] = V(1)},
138 [B(NI_RTSI_BRD(0))] = {[B(brd0_src0)] = V(0),
139 [B(brd0_src1)] = V(1)},
140 [B(NI_RTSI_BRD(1))] = {[B(brd1_src0)] = V(0),
141 [B(brd1_src1)] = V(1)},
142 [B(NI_RTSI_BRD(2))] = {[B(brd2_src0)] = V(0),
143 [B(brd2_src1)] = V(1)},
144 [B(NI_RTSI_BRD(3))] = {[B(brd3_src0)] = V(0),
[all …]
/kernel/liteos_m/arch/arm/arm9/gcc/
Dreset_vector.S73 B HalResetVector
74 B HalExceptUndefInstrHdl
75 B HalExceptSwiHdl
76 B HalExceptPrefetchAbortHdl
77 B HalExceptDataAbortHdl
78 B HalExceptAddrAbortHdl
79 B HalExceptIrqHdl
80 B HalExceptFiqHdl
109 B main
110 B .
/kernel/linux/linux-5.10/Documentation/driver-api/
Dio_ordering.rst24 CPU B: spin_lock_irqsave(&dev_lock, flags)
25 CPU B: val = readl(my_status);
26 CPU B: ...
27 CPU B: writel(newval2, ring_ptr);
28 CPU B: spin_unlock_irqrestore(&dev_lock, flags)
42 CPU B: spin_lock_irqsave(&dev_lock, flags)
43 CPU B: val = readl(my_status);
44 CPU B: ...
45 CPU B: writel(newval2, ring_ptr);
46 CPU B: (void)readl(safe_register); /* maybe a config register? */
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/sunxi/
Dpinctrl-sun50i-h6.c38 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
41 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
44 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
47 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
50 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
53 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
56 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
59 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
62 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
65 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
[all …]

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