1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 4 Broadcom B43legacy wireless driver 5 6 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>, 7 Stefano Brivio <stefano.brivio@polimi.it> 8 Michael Buesch <m@bues.ch> 9 Danny van Dyk <kugelfang@gentoo.org> 10 Andreas Jaggi <andreas.jaggi@waterwave.ch> 11 Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net> 12 13 Some parts of the code in this file are derived from the ipw2200 14 driver Copyright(c) 2003 - 2004 Intel Corporation. 15 16 17 */ 18 19 #ifndef B43legacy_PHY_H_ 20 #define B43legacy_PHY_H_ 21 22 #include <linux/types.h> 23 24 enum { 25 B43legacy_ANTENNA0, /* Antenna 0 */ 26 B43legacy_ANTENNA1, /* Antenna 0 */ 27 B43legacy_ANTENNA_AUTO1, /* Automatic, starting with antenna 1 */ 28 B43legacy_ANTENNA_AUTO0, /* Automatic, starting with antenna 0 */ 29 30 B43legacy_ANTENNA_AUTO = B43legacy_ANTENNA_AUTO0, 31 B43legacy_ANTENNA_DEFAULT = B43legacy_ANTENNA_AUTO, 32 }; 33 34 enum { 35 B43legacy_INTERFMODE_NONE, 36 B43legacy_INTERFMODE_NONWLAN, 37 B43legacy_INTERFMODE_MANUALWLAN, 38 B43legacy_INTERFMODE_AUTOWLAN, 39 }; 40 41 /*** PHY Registers ***/ 42 43 /* Routing */ 44 #define B43legacy_PHYROUTE_OFDM_GPHY 0x400 45 #define B43legacy_PHYROUTE_EXT_GPHY 0x800 46 47 /* Base registers. */ 48 #define B43legacy_PHY_BASE(reg) (reg) 49 /* OFDM (A) registers of a G-PHY */ 50 #define B43legacy_PHY_OFDM(reg) ((reg) | B43legacy_PHYROUTE_OFDM_GPHY) 51 /* Extended G-PHY registers */ 52 #define B43legacy_PHY_EXTG(reg) ((reg) | B43legacy_PHYROUTE_EXT_GPHY) 53 54 55 /* Extended G-PHY Registers */ 56 #define B43legacy_PHY_CLASSCTL B43legacy_PHY_EXTG(0x02) /* Classify control */ 57 #define B43legacy_PHY_GTABCTL B43legacy_PHY_EXTG(0x03) /* G-PHY table control (see below) */ 58 #define B43legacy_PHY_GTABOFF 0x03FF /* G-PHY table offset (see below) */ 59 #define B43legacy_PHY_GTABNR 0xFC00 /* G-PHY table number (see below) */ 60 #define B43legacy_PHY_GTABNR_SHIFT 10 61 #define B43legacy_PHY_GTABDATA B43legacy_PHY_EXTG(0x04) /* G-PHY table data */ 62 #define B43legacy_PHY_LO_MASK B43legacy_PHY_EXTG(0x0F) /* Local Oscillator control mask */ 63 #define B43legacy_PHY_LO_CTL B43legacy_PHY_EXTG(0x10) /* Local Oscillator control */ 64 #define B43legacy_PHY_RFOVER B43legacy_PHY_EXTG(0x11) /* RF override */ 65 #define B43legacy_PHY_RFOVERVAL B43legacy_PHY_EXTG(0x12) /* RF override value */ 66 /*** OFDM table numbers ***/ 67 #define B43legacy_OFDMTAB(number, offset) \ 68 (((number) << B43legacy_PHY_OTABLENR_SHIFT) \ 69 | (offset)) 70 #define B43legacy_OFDMTAB_AGC1 B43legacy_OFDMTAB(0x00, 0) 71 #define B43legacy_OFDMTAB_GAIN0 B43legacy_OFDMTAB(0x00, 0) 72 #define B43legacy_OFDMTAB_GAINX B43legacy_OFDMTAB(0x01, 0) 73 #define B43legacy_OFDMTAB_GAIN1 B43legacy_OFDMTAB(0x01, 4) 74 #define B43legacy_OFDMTAB_AGC3 B43legacy_OFDMTAB(0x02, 0) 75 #define B43legacy_OFDMTAB_GAIN2 B43legacy_OFDMTAB(0x02, 3) 76 #define B43legacy_OFDMTAB_LNAHPFGAIN1 B43legacy_OFDMTAB(0x03, 0) 77 #define B43legacy_OFDMTAB_WRSSI B43legacy_OFDMTAB(0x04, 0) 78 #define B43legacy_OFDMTAB_LNAHPFGAIN2 B43legacy_OFDMTAB(0x04, 0) 79 #define B43legacy_OFDMTAB_NOISESCALE B43legacy_OFDMTAB(0x05, 0) 80 #define B43legacy_OFDMTAB_AGC2 B43legacy_OFDMTAB(0x06, 0) 81 #define B43legacy_OFDMTAB_ROTOR B43legacy_OFDMTAB(0x08, 0) 82 #define B43legacy_OFDMTAB_ADVRETARD B43legacy_OFDMTAB(0x09, 0) 83 #define B43legacy_OFDMTAB_DAC B43legacy_OFDMTAB(0x0C, 0) 84 #define B43legacy_OFDMTAB_DC B43legacy_OFDMTAB(0x0E, 7) 85 #define B43legacy_OFDMTAB_PWRDYN2 B43legacy_OFDMTAB(0x0E, 12) 86 #define B43legacy_OFDMTAB_LNAGAIN B43legacy_OFDMTAB(0x0E, 13) 87 88 #define B43legacy_OFDMTAB_LPFGAIN B43legacy_OFDMTAB(0x0F, 12) 89 #define B43legacy_OFDMTAB_RSSI B43legacy_OFDMTAB(0x10, 0) 90 91 #define B43legacy_OFDMTAB_AGC1_R1 B43legacy_OFDMTAB(0x13, 0) 92 #define B43legacy_OFDMTAB_GAINX_R1 B43legacy_OFDMTAB(0x14, 0) 93 #define B43legacy_OFDMTAB_MINSIGSQ B43legacy_OFDMTAB(0x14, 1) 94 #define B43legacy_OFDMTAB_AGC3_R1 B43legacy_OFDMTAB(0x15, 0) 95 #define B43legacy_OFDMTAB_WRSSI_R1 B43legacy_OFDMTAB(0x15, 4) 96 #define B43legacy_OFDMTAB_TSSI B43legacy_OFDMTAB(0x15, 0) 97 #define B43legacy_OFDMTAB_DACRFPABB B43legacy_OFDMTAB(0x16, 0) 98 #define B43legacy_OFDMTAB_DACOFF B43legacy_OFDMTAB(0x17, 0) 99 #define B43legacy_OFDMTAB_DCBIAS B43legacy_OFDMTAB(0x18, 0) 100 101 void b43legacy_put_attenuation_into_ranges(int *_bbatt, int *_rfatt); 102 103 /* OFDM (A) PHY Registers */ 104 #define B43legacy_PHY_VERSION_OFDM B43legacy_PHY_OFDM(0x00) /* Versioning register for A-PHY */ 105 #define B43legacy_PHY_BBANDCFG B43legacy_PHY_OFDM(0x01) /* Baseband config */ 106 #define B43legacy_PHY_BBANDCFG_RXANT 0x180 /* RX Antenna selection */ 107 #define B43legacy_PHY_BBANDCFG_RXANT_SHIFT 7 108 #define B43legacy_PHY_PWRDOWN B43legacy_PHY_OFDM(0x03) /* Powerdown */ 109 #define B43legacy_PHY_CRSTHRES1 B43legacy_PHY_OFDM(0x06) /* CRS Threshold 1 */ 110 #define B43legacy_PHY_LNAHPFCTL B43legacy_PHY_OFDM(0x1C) /* LNA/HPF control */ 111 #define B43legacy_PHY_ADIVRELATED B43legacy_PHY_OFDM(0x27) /* FIXME rename */ 112 #define B43legacy_PHY_CRS0 B43legacy_PHY_OFDM(0x29) 113 #define B43legacy_PHY_ANTDWELL B43legacy_PHY_OFDM(0x2B) /* Antenna dwell */ 114 #define B43legacy_PHY_ANTDWELL_AUTODIV1 0x0100 /* Automatic RX diversity start antenna */ 115 #define B43legacy_PHY_ENCORE B43legacy_PHY_OFDM(0x49) /* "Encore" (RangeMax / BroadRange) */ 116 #define B43legacy_PHY_ENCORE_EN 0x0200 /* Encore enable */ 117 #define B43legacy_PHY_LMS B43legacy_PHY_OFDM(0x55) 118 #define B43legacy_PHY_OFDM61 B43legacy_PHY_OFDM(0x61) /* FIXME rename */ 119 #define B43legacy_PHY_OFDM61_10 0x0010 /* FIXME rename */ 120 #define B43legacy_PHY_IQBAL B43legacy_PHY_OFDM(0x69) /* I/Q balance */ 121 #define B43legacy_PHY_OTABLECTL B43legacy_PHY_OFDM(0x72) /* OFDM table control (see below) */ 122 #define B43legacy_PHY_OTABLEOFF 0x03FF /* OFDM table offset (see below) */ 123 #define B43legacy_PHY_OTABLENR 0xFC00 /* OFDM table number (see below) */ 124 #define B43legacy_PHY_OTABLENR_SHIFT 10 125 #define B43legacy_PHY_OTABLEI B43legacy_PHY_OFDM(0x73) /* OFDM table data I */ 126 #define B43legacy_PHY_OTABLEQ B43legacy_PHY_OFDM(0x74) /* OFDM table data Q */ 127 #define B43legacy_PHY_HPWR_TSSICTL B43legacy_PHY_OFDM(0x78) /* Hardware power TSSI control */ 128 #define B43legacy_PHY_NRSSITHRES B43legacy_PHY_OFDM(0x8A) /* NRSSI threshold */ 129 #define B43legacy_PHY_ANTWRSETT B43legacy_PHY_OFDM(0x8C) /* Antenna WR settle */ 130 #define B43legacy_PHY_ANTWRSETT_ARXDIV 0x2000 /* Automatic RX diversity enabled */ 131 #define B43legacy_PHY_CLIPPWRDOWNT B43legacy_PHY_OFDM(0x93) /* Clip powerdown threshold */ 132 #define B43legacy_PHY_OFDM9B B43legacy_PHY_OFDM(0x9B) /* FIXME rename */ 133 #define B43legacy_PHY_N1P1GAIN B43legacy_PHY_OFDM(0xA0) 134 #define B43legacy_PHY_P1P2GAIN B43legacy_PHY_OFDM(0xA1) 135 #define B43legacy_PHY_N1N2GAIN B43legacy_PHY_OFDM(0xA2) 136 #define B43legacy_PHY_CLIPTHRES B43legacy_PHY_OFDM(0xA3) 137 #define B43legacy_PHY_CLIPN1P2THRES B43legacy_PHY_OFDM(0xA4) 138 #define B43legacy_PHY_DIVSRCHIDX B43legacy_PHY_OFDM(0xA8) /* Divider search gain/index */ 139 #define B43legacy_PHY_CLIPP2THRES B43legacy_PHY_OFDM(0xA9) 140 #define B43legacy_PHY_CLIPP3THRES B43legacy_PHY_OFDM(0xAA) 141 #define B43legacy_PHY_DIVP1P2GAIN B43legacy_PHY_OFDM(0xAB) 142 #define B43legacy_PHY_DIVSRCHGAINBACK B43legacy_PHY_OFDM(0xAD) /* Divider search gain back */ 143 #define B43legacy_PHY_DIVSRCHGAINCHNG B43legacy_PHY_OFDM(0xAE) /* Divider search gain change */ 144 #define B43legacy_PHY_CRSTHRES1_R1 B43legacy_PHY_OFDM(0xC0) /* CRS Threshold 1 (rev 1 only) */ 145 #define B43legacy_PHY_CRSTHRES2_R1 B43legacy_PHY_OFDM(0xC1) /* CRS Threshold 2 (rev 1 only) */ 146 #define B43legacy_PHY_TSSIP_LTBASE B43legacy_PHY_OFDM(0x380) /* TSSI power lookup table base */ 147 #define B43legacy_PHY_DC_LTBASE B43legacy_PHY_OFDM(0x3A0) /* DC lookup table base */ 148 #define B43legacy_PHY_GAIN_LTBASE B43legacy_PHY_OFDM(0x3C0) /* Gain lookup table base */ 149 150 void b43legacy_put_attenuation_into_ranges(int *_bbatt, int *_rfatt); 151 152 /* Masks for the different PHY versioning registers. */ 153 #define B43legacy_PHYVER_ANALOG 0xF000 154 #define B43legacy_PHYVER_ANALOG_SHIFT 12 155 #define B43legacy_PHYVER_TYPE 0x0F00 156 #define B43legacy_PHYVER_TYPE_SHIFT 8 157 #define B43legacy_PHYVER_VERSION 0x00FF 158 159 struct b43legacy_wldev; 160 161 void b43legacy_phy_lock(struct b43legacy_wldev *dev); 162 void b43legacy_phy_unlock(struct b43legacy_wldev *dev); 163 164 /* Card uses the loopback gain stuff */ 165 #define has_loopback_gain(phy) \ 166 (((phy)->rev > 1) || ((phy)->gmode)) 167 168 u16 b43legacy_phy_read(struct b43legacy_wldev *dev, u16 offset); 169 void b43legacy_phy_write(struct b43legacy_wldev *dev, u16 offset, u16 val); 170 171 int b43legacy_phy_init_tssi2dbm_table(struct b43legacy_wldev *dev); 172 int b43legacy_phy_init(struct b43legacy_wldev *dev); 173 174 void b43legacy_set_rx_antenna(struct b43legacy_wldev *dev, int antenna); 175 176 void b43legacy_phy_set_antenna_diversity(struct b43legacy_wldev *dev); 177 void b43legacy_phy_calibrate(struct b43legacy_wldev *dev); 178 int b43legacy_phy_connect(struct b43legacy_wldev *dev, int connect); 179 180 void b43legacy_phy_lo_b_measure(struct b43legacy_wldev *dev); 181 void b43legacy_phy_lo_g_measure(struct b43legacy_wldev *dev); 182 void b43legacy_phy_xmitpower(struct b43legacy_wldev *dev); 183 184 /* Adjust the LocalOscillator to the saved values. 185 * "fixed" is only set to 1 once in initialization. Set to 0 otherwise. 186 */ 187 void b43legacy_phy_lo_adjust(struct b43legacy_wldev *dev, int fixed); 188 void b43legacy_phy_lo_mark_all_unused(struct b43legacy_wldev *dev); 189 190 void b43legacy_phy_set_baseband_attenuation(struct b43legacy_wldev *dev, 191 u16 baseband_attenuation); 192 193 void b43legacy_power_saving_ctl_bits(struct b43legacy_wldev *dev, 194 int bit25, int bit26); 195 196 #endif /* B43legacy_PHY_H_ */ 197