Searched refs:B4_R1_CSR (Results 1 – 2 of 2) sorted by relevance
785 outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_P) ; in fddi_isr()790 outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_C) ; in fddi_isr()827 outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_F) ; in fddi_isr()834 outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_F) ; in fddi_isr()
163 #define B4_R1_CSR 0x021c /* 32 bit BMU Control/Status Register */ macro