| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| D | sun8i-a23-a33-ccu.h | 100 #define CLK_I2S1 73 macro
|
| D | sun8i-a83t-ccu.h | 110 #define CLK_I2S1 73 macro
|
| D | sun50i-a64-ccu.h | 105 #define CLK_I2S1 83 macro
|
| D | sun8i-h3-ccu.h | 118 #define CLK_I2S1 85 macro
|
| D | sun50i-a100-ccu.h | 77 #define CLK_I2S1 93 macro
|
| D | sun9i-a80-ccu.h | 78 #define CLK_I2S1 52 macro
|
| D | sun50i-h6-ccu.h | 78 #define CLK_I2S1 92 macro
|
| D | sun8i-r40-ccu.h | 142 #define CLK_I2S1 118 macro
|
| D | sun4i-a10-ccu.h | 159 #define CLK_I2S1 128 macro
|
| D | exynos5250.h | 110 #define CLK_I2S1 307 macro
|
| D | s5pv210.h | 170 #define CLK_I2S1 152 macro
|
| D | exynos5420.h | 84 #define CLK_I2S1 275 macro
|
| D | exynos4.h | 168 #define CLK_I2S1 330 macro
|
| /kernel/linux/linux-5.10/drivers/clk/zte/ |
| D | clk-zx296702.c | 41 #define CLK_I2S1 (lsp0crpm_base + 0x20) macro
642 ARRAY_SIZE(i2s_wclk_sel), CLK_I2S1, 4, 1); in zx296702_lsp0_clocks_init()
644 zx_gate("i2s1_wclk", "i2s1_wclk_mux", CLK_I2S1, 1); in zx296702_lsp0_clocks_init()
646 zx_gate("i2s1_pclk", "lsp0_apb_pclk", CLK_I2S1, 0); in zx296702_lsp0_clocks_init()
|
| /kernel/linux/linux-5.10/drivers/clk/sunxi-ng/ |
| D | ccu-sun8i-h3.c | 829 [CLK_I2S1] = &i2s1_clk.common.hw,
945 [CLK_I2S1] = &i2s1_clk.common.hw,
|
| D | ccu-sun8i-a23.c | 640 [CLK_I2S1] = &i2s1_clk.common.hw,
|
| D | ccu-sun8i-a33.c | 682 [CLK_I2S1] = &i2s1_clk.common.hw,
|
| D | ccu-sun50i-a64.c | 821 [CLK_I2S1] = &i2s1_clk.common.hw,
|
| D | ccu-sun8i-a83t.c | 768 [CLK_I2S1] = &i2s1_clk.common.hw,
|
| D | ccu-sun50i-a100.c | 1023 [CLK_I2S1] = &i2s1_clk.common.hw,
|
| D | ccu-sun50i-h6.c | 1029 [CLK_I2S1] = &i2s1_clk.common.hw,
|
| D | ccu-sun9i-a80.c | 1024 [CLK_I2S1] = &i2s1_clk.common.hw,
|
| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| D | clk-s5pv210.c | 582 GATE(CLK_I2S1, "i2s1", "dout_pclkp", CLK_GATE_IP3, 5, 0, 0),
|
| D | clk-exynos5250.c | 591 GATE(CLK_I2S1, "i2s1", "div_aclk66", GATE_IP_PERIC, 20, 0, 0),
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | s5pv210.dtsi | 266 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
|