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Searched refs:CLK_MCT (Results 1 – 16 of 16) sorted by relevance

/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dexynos5410.h50 #define CLK_MCT 315 macro
Dexynos5250.h138 #define CLK_MCT 335 macro
Dexynos5420.h108 #define CLK_MCT 315 macro
Dexynos4.h182 #define CLK_MCT 344 macro
Dexynos3250.h153 #define CLK_MCT 147 macro
/kernel/linux/linux-5.10/drivers/clk/samsung/
Dclk-exynos5410.c167 GATE(CLK_MCT, "mct", "aclk66", GATE_IP_PERIS, 18, 0, 0),
Dclk-exynos4.c945 GATE(CLK_MCT, "mct", "aclk100", E4210_GATE_IP_PERIR, 13,
985 GATE(CLK_MCT, "mct", "aclk100", E4X12_GATE_IP_PERIR, 13,
Dclk-exynos5250.c625 GATE(CLK_MCT, "mct", "div_aclk66", GATE_IP_PERIS, 18, 0, 0),
Dclk-exynos3250.c478 GATE(CLK_MCT, "mct", "div_aclk_100", GATE_IP_PERIR, 13, 0, 0),
Dclk-exynos5420.c1123 GATE(CLK_MCT, "mct", "aclk66_psgen", GATE_IP_PERIS, 18, 0, 0),
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dexynos5410.dtsi323 clocks = <&fin_pll>, <&clock CLK_MCT>;
Dexynos4210.dtsi114 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
Dexynos4412.dtsi251 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
Dexynos3250.dtsi271 clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>;
Dexynos5250.dtsi239 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
Dexynos5420.dtsi1307 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;