Searched refs:CLK_MM_DISP_WDMA1 (Results 1 – 8 of 8) sorted by relevance
| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| D | clk-mt6797-mm.c | 67 GATE_MM0(CLK_MM_DISP_WDMA1, "mm_disp_wdma1", "mm_sel", 22),
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| D | clk-mt8173-mm.c | 69 GATE_MM0(CLK_MM_DISP_WDMA1, "mm_disp_wdma1", "mm_sel", 22),
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| D | clk-mt2712-mm.c | 84 GATE_MM0(CLK_MM_DISP_WDMA1, "mm_disp_wdma1", "mm_sel", 22),
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| D | mt6797-clk.h | 237 #define CLK_MM_DISP_WDMA1 23 macro
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| D | mt8173-clk.h | 270 #define CLK_MM_DISP_WDMA1 22 macro
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| D | mt2712-clk.h | 323 #define CLK_MM_DISP_WDMA1 22 macro
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/mediatek/ |
| D | mediatek,disp.txt | 143 clocks = <&mmsys CLK_MM_DISP_WDMA1>;
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/ |
| D | mt8173.dtsi | 1078 clocks = <&mmsys CLK_MM_DISP_WDMA1>;
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