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Searched refs:CLK_TOP_MSDC50_0_H_SEL (Results 1 – 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dmt8173-clk.h105 #define CLK_TOP_MSDC50_0_H_SEL 95 macro
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dmtk-sd.txt64 <&topckgen CLK_TOP_MSDC50_0_H_SEL>;
/kernel/linux/linux-5.10/drivers/clk/mediatek/
Dclk-mt8173.c558 MUX_GATE(CLK_TOP_MSDC50_0_H_SEL, "msdc50_0_h_sel", msdc50_0_h_parents, 0x0070, 8, 3, 15),
/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi827 <&topckgen CLK_TOP_MSDC50_0_H_SEL>;