Searched refs:DISPC_CONTROL (Results 1 – 5 of 5) sorted by relevance
/kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
D | display.c | 43 #define DISPC_CONTROL 0x0040 macro 302 v = omap_hwmod_read(oh, DISPC_CONTROL); in dispc_disable_outputs() 349 v = omap_hwmod_read(oh, DISPC_CONTROL); in dispc_disable_outputs() 351 omap_hwmod_write(v, oh, DISPC_CONTROL); in dispc_disable_outputs()
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/kernel/linux/linux-5.10/drivers/video/fbdev/omap2/omapfb/dss/ |
D | dispc.c | 174 [DISPC_MGR_FLD_ENABLE] = { DISPC_CONTROL, 0, 0 }, 175 [DISPC_MGR_FLD_STNTFT] = { DISPC_CONTROL, 3, 3 }, 176 [DISPC_MGR_FLD_GO] = { DISPC_CONTROL, 5, 5 }, 177 [DISPC_MGR_FLD_TFTDATALINES] = { DISPC_CONTROL, 9, 8 }, 178 [DISPC_MGR_FLD_STALLMODE] = { DISPC_CONTROL, 11, 11 }, 191 [DISPC_MGR_FLD_ENABLE] = { DISPC_CONTROL, 1, 1 }, 193 [DISPC_MGR_FLD_GO] = { DISPC_CONTROL, 6, 6 }, 270 const bool need_lock = rfld.reg == DISPC_CONTROL || rfld.reg == DISPC_CONFIG; in mgr_fld_write() 2810 REG_FLD_MOD(DISPC_CONTROL, act_high ? 1 : 0, 29, 29); in dispc_lcd_enable_signal_polarity() 2818 REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 28, 28); in dispc_lcd_enable_signal() [all …]
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D | dispc.h | 18 #define DISPC_CONTROL 0x0040 macro
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/kernel/linux/linux-5.10/drivers/gpu/drm/omapdrm/dss/ |
D | dispc.c | 260 [DISPC_MGR_FLD_ENABLE] = { DISPC_CONTROL, 0, 0 }, 261 [DISPC_MGR_FLD_STNTFT] = { DISPC_CONTROL, 3, 3 }, 262 [DISPC_MGR_FLD_GO] = { DISPC_CONTROL, 5, 5 }, 263 [DISPC_MGR_FLD_TFTDATALINES] = { DISPC_CONTROL, 9, 8 }, 264 [DISPC_MGR_FLD_STALLMODE] = { DISPC_CONTROL, 11, 11 }, 283 [DISPC_MGR_FLD_ENABLE] = { DISPC_CONTROL, 1, 1 }, 285 [DISPC_MGR_FLD_GO] = { DISPC_CONTROL, 6, 6 }, 2895 REG_FLD_MOD(dispc, DISPC_CONTROL, act_high ? 1 : 0, 29, 29); in dispc_lcd_enable_signal_polarity() 2903 REG_FLD_MOD(dispc, DISPC_CONTROL, enable ? 1 : 0, 28, 28); in dispc_lcd_enable_signal() 2911 REG_FLD_MOD(dispc, DISPC_CONTROL, enable ? 1 : 0, 27, 27); in dispc_pck_free_enable() [all …]
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D | dispc.h | 16 #define DISPC_CONTROL 0x0040 macro
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