Searched refs:DpllDivisor (Results 1 – 2 of 2) sorted by relevance
4785 u32 DpllDivisor; in usc_set_sdlc_mode() local4794 DpllDivisor = 16; in usc_set_sdlc_mode()4798 DpllDivisor = 8; in usc_set_sdlc_mode()4802 DpllDivisor = 32; in usc_set_sdlc_mode()4820 Tc = (u16)((XtalSpeed/DpllDivisor)/info->params.clock_speed); in usc_set_sdlc_mode()4821 if ( !((((XtalSpeed/DpllDivisor) % info->params.clock_speed) * 2) in usc_set_sdlc_mode()
4500 u32 DpllDivisor; in hdlc_mode() local4567 DpllDivisor = 16; in hdlc_mode()4570 DpllDivisor = 8; in hdlc_mode()4572 DpllDivisor = 32; in hdlc_mode()4605 set_rate(info, info->params.clock_speed * DpllDivisor); in hdlc_mode()