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Searched refs:GCC_BLSP1_QUP2_BCR (Results 1 – 18 of 18) sorted by relevance

/kernel/linux/linux-5.10/include/dt-bindings/reset/
Dqcom,gcc-msm8974.h28 #define GCC_BLSP1_QUP2_BCR 19 macro
Dqcom,gcc-msm8916.h12 #define GCC_BLSP1_QUP2_BCR 3 macro
Dqcom,gcc-apq8084.h28 #define GCC_BLSP1_QUP2_BCR 19 macro
Dqcom,gcc-msm8939.h12 #define GCC_BLSP1_QUP2_BCR 3 macro
Dqcom,gcc-ipq6018.h12 #define GCC_BLSP1_QUP2_BCR 3 macro
/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dqcom,gcc-ipq4019.h129 #define GCC_BLSP1_QUP2_BCR 33 macro
Dqcom,gcc-msm8998.h193 #define GCC_BLSP1_QUP2_BCR 1 macro
Dqcom,gcc-msm8996.h259 #define GCC_BLSP1_QUP2_BCR 19 macro
Dqcom,gcc-ipq8074.h240 #define GCC_BLSP1_QUP2_BCR 3 macro
/kernel/linux/linux-5.10/drivers/clk/qcom/
Dgcc-ipq4019.c1673 [GCC_BLSP1_QUP2_BCR] = {0x03008, 0},
Dgcc-msm8974.c2601 [GCC_BLSP1_QUP2_BCR] = { 0x06c0 },
Dgcc-msm8916.c3266 [GCC_BLSP1_QUP2_BCR] = { 0x03008 },
Dgcc-msm8998.c2957 [GCC_BLSP1_QUP2_BCR] = { 0x1b000 },
Dgcc-apq8084.c3500 [GCC_BLSP1_QUP2_BCR] = { 0x06c0 },
Dgcc-msm8996.c3518 [GCC_BLSP1_QUP2_BCR] = { 0x1b000 },
Dgcc-ipq8074.c4664 [GCC_BLSP1_QUP2_BCR] = { 0x03008, 0 },
Dgcc-msm8939.c3818 [GCC_BLSP1_QUP2_BCR] = { 0x03008 },
Dgcc-ipq6018.c4416 [GCC_BLSP1_QUP2_BCR] = { 0x03008, 0 },