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Searched refs:I915_GEM_HWS_SEQNO_ADDR (Results 1 – 5 of 5) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
Dgen6_engine_cs.c377 …M_BUG_ON(offset_in_page(i915_request_active_timeline(rq)->hwsp_offset) != I915_GEM_HWS_SEQNO_ADDR); in gen6_emit_breadcrumb_xcs()
380 *cs++ = I915_GEM_HWS_SEQNO_ADDR | MI_FLUSH_DW_USE_GTT; in gen6_emit_breadcrumb_xcs()
397 …M_BUG_ON(offset_in_page(i915_request_active_timeline(rq)->hwsp_offset) != I915_GEM_HWS_SEQNO_ADDR); in gen7_emit_breadcrumb_xcs()
401 *cs++ = I915_GEM_HWS_SEQNO_ADDR | MI_FLUSH_DW_USE_GTT; in gen7_emit_breadcrumb_xcs()
406 *cs++ = I915_GEM_HWS_SEQNO_ADDR; in gen7_emit_breadcrumb_xcs()
Dgen2_engine_cs.c146 …M_BUG_ON(offset_in_page(i915_request_active_timeline(rq)->hwsp_offset) != I915_GEM_HWS_SEQNO_ADDR); in __gen2_emit_breadcrumb()
158 *cs++ = I915_GEM_HWS_SEQNO_ADDR; in __gen2_emit_breadcrumb()
Dintel_engine.h188 #define I915_GEM_HWS_SEQNO_ADDR (I915_GEM_HWS_SEQNO * sizeof(u32)) macro
Dintel_ring_submission.c1267 I915_GEM_HWS_SEQNO_ADDR); in intel_ring_submission_setup()
Dintel_engine_cs.c842 return create_pinned_context(engine, I915_GEM_HWS_SEQNO_ADDR, in create_kernel_context()