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Searched refs:INTEL_ARCH_EVENT_MASK (Results 1 – 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/arch/x86/events/
Dperf_event.h94 ((config & INTEL_ARCH_EVENT_MASK) >= INTEL_TD_METRIC_RETIRING) && in is_metric_event()
95 ((config & INTEL_ARCH_EVENT_MASK) <= INTEL_TD_METRIC_MAX); in is_metric_event()
100 return (event->attr.config & INTEL_ARCH_EVENT_MASK) == INTEL_TD_SLOTS; in is_slots_event()
424 INTEL_ARCH_EVENT_MASK)
430 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK)
438 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS)
441 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK, \
445 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
449 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
489 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
[all …]
/kernel/linux/linux-5.10/arch/x86/include/asm/
Dperf_event.h48 #define INTEL_ARCH_EVENT_MASK \ macro
/kernel/linux/linux-5.10/arch/x86/events/intel/
Dcore.c2917 event->hw.config &= ~INTEL_ARCH_EVENT_MASK; in intel_fixup_er()
2921 event->hw.config &= ~INTEL_ARCH_EVENT_MASK; in intel_fixup_er()
3571 if ((event->attr.config & INTEL_ARCH_EVENT_MASK) == INTEL_FIXED_VLBR_EVENT) in intel_pmu_hw_config()
3941 if ((event->hw.config & INTEL_ARCH_EVENT_MASK) == in bdw_limit_period()
Dds.c995 ((attr->config & INTEL_ARCH_EVENT_MASK) == in pebs_update_adaptive_cfg()