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Searched refs:INTEL_GEN (Results 1 – 25 of 112) sorted by relevance

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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
Ddebugfs_gt_pm.c87 if (INTEL_GEN(i915) >= 9) { in gen6_drpc()
94 if (INTEL_GEN(i915) <= 7) in gen6_drpc()
102 if (INTEL_GEN(i915) >= 9) { in gen6_drpc()
136 if (INTEL_GEN(i915) >= 9) { in gen6_drpc()
152 if (INTEL_GEN(i915) <= 7) { in gen6_drpc()
232 else if (INTEL_GEN(i915) >= 6) in drpc_show()
298 } else if (INTEL_GEN(i915) >= 6) { in frequency_show()
323 if (INTEL_GEN(i915) >= 9) { in frequency_show()
356 if (INTEL_GEN(i915) >= 11) { in frequency_show()
365 } else if (INTEL_GEN(i915) >= 8) { in frequency_show()
[all …]
Dintel_gt_pm_irq.c20 if (INTEL_GEN(i915) >= 11) { in write_pm_imr()
23 } else if (INTEL_GEN(i915) >= 8) { in write_pm_imr()
65 i915_reg_t reg = INTEL_GEN(gt->i915) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR; in gen6_gt_pm_reset_iir()
81 if (INTEL_GEN(i915) >= 11) { in write_pm_ier()
84 } else if (INTEL_GEN(i915) >= 8) { in write_pm_ier()
Dintel_gt.c97 if (HAS_EDRAM(i915) && INTEL_GEN(i915) < 9) in intel_gt_init_hw()
173 if (INTEL_GEN(i915) < 4) in intel_gt_clear_error_registers()
191 if (INTEL_GEN(i915) >= 12) { in intel_gt_clear_error_registers()
194 } else if (INTEL_GEN(i915) >= 8) { in intel_gt_clear_error_registers()
197 } else if (INTEL_GEN(i915) >= 6) { in intel_gt_clear_error_registers()
235 if (INTEL_GEN(gt->i915) >= 12) { in gen8_check_faults()
275 if (INTEL_GEN(i915) >= 8) in intel_gt_check_and_clear_faults()
277 else if (INTEL_GEN(i915) >= 6) in intel_gt_check_and_clear_faults()
329 if (INTEL_GEN(gt->i915) < 6) in intel_gt_chipset_flush()
718 if (INTEL_GEN(i915) == 12) { in intel_gt_invalidate_tlbs()
[all …]
Dintel_engine_cs.c166 switch (INTEL_GEN(gt->i915)) { in intel_engine_context_size()
168 MISSING_CASE(INTEL_GEN(gt->i915)); in intel_engine_context_size()
205 INTEL_GEN(gt->i915), cxt_size * 64, in intel_engine_context_size()
221 if (INTEL_GEN(gt->i915) < 8) in intel_engine_context_size()
233 if (INTEL_GEN(i915) >= bases[i].gen) in __engine_mmio_base()
260 if (INTEL_GEN(engine->i915) < 6 && engine->class != RENDER_CLASS) in intel_engine_set_hwsp_writemask()
263 if (INTEL_GEN(engine->i915) >= 3) in intel_engine_set_hwsp_writemask()
328 if (INTEL_GEN(i915) == 12 && engine->class == RENDER_CLASS) in intel_engine_setup()
365 if (INTEL_GEN(i915) >= 11 || in __setup_engine_capabilities()
366 (INTEL_GEN(i915) >= 9 && engine->instance == 0)) in __setup_engine_capabilities()
[all …]
Dintel_gtt.c259 else if (INTEL_GEN(i915) >= 9 && INTEL_GEN(i915) <= 11) in gtt_write_workarounds()
276 INTEL_GEN(i915) <= 10) in gtt_write_workarounds()
407 GEM_BUG_ON(INTEL_GEN(i915) < 8); in setup_private_pat()
409 if (INTEL_GEN(i915) >= 12) in setup_private_pat()
411 else if (INTEL_GEN(i915) >= 10) in setup_private_pat()
Dintel_llc.c68 if (INTEL_GEN(i915) >= 9) { in get_ia_constants()
87 if (INTEL_GEN(i915) >= 9) { in calc_ia_freq()
93 } else if (INTEL_GEN(i915) >= 8) { in calc_ia_freq()
Dintel_ring_submission.c55 if (INTEL_GEN(engine->i915) >= 6) in set_hwstam()
69 if (INTEL_GEN(engine->i915) >= 4) in set_hws_pga()
164 if (INTEL_GEN(dev_priv) > 2) { in stop_ring()
307 if (INTEL_GEN(dev_priv) > 2) in xcs_resume()
1027 drm_WARN_ON(&dev_priv->drm, INTEL_GEN(dev_priv) > 2 && in ring_release()
1048 if (INTEL_GEN(i915) >= 6) { in setup_irq()
1051 } else if (INTEL_GEN(i915) >= 5) { in setup_irq()
1054 } else if (INTEL_GEN(i915) >= 3) { in setup_irq()
1068 GEM_BUG_ON(INTEL_GEN(i915) >= 8); in setup_common()
1092 if (INTEL_GEN(i915) >= 6) in setup_common()
[all …]
Dintel_ggtt_fencing.c77 if (INTEL_GEN(fence_to_i915(fence)) >= 6) { in i965_write_fence_reg()
209 return INTEL_GEN(fence_to_i915(fence)) < 4; in gpu_uses_fence_registers()
572 if (INTEL_GEN(i915) >= 8 || IS_VALLEYVIEW(i915)) { in detect_bit_6_swizzle()
582 } else if (INTEL_GEN(i915) >= 6) { in detect_bit_6_swizzle()
844 else if (INTEL_GEN(i915) >= 7 && in intel_ggtt_init_fences()
847 else if (INTEL_GEN(i915) >= 4 || in intel_ggtt_init_fences()
895 if (INTEL_GEN(i915) < 5 || in intel_gt_init_swizzling()
919 MISSING_CASE(INTEL_GEN(i915)); in intel_gt_init_swizzling()
Dintel_rps.c200 if (INTEL_GEN(gt->i915) >= 11) in rps_reset_interrupts()
609 if (INTEL_GEN(rps_to_i915(rps)) >= 9) { in rps_limits()
676 (INTEL_GEN(gt->i915) > 9 ? 0 : GEN6_RP_MEDIA_TURBO) | in rps_set_power()
750 if (INTEL_GEN(i915) >= 9) in gen6_rps_set()
786 if (INTEL_GEN(i915) < 6) in rps_set()
978 IS_GEN9_BC(i915) || INTEL_GEN(i915) >= 10) { in gen6_rps_init()
991 if (IS_GEN9_BC(i915) || INTEL_GEN(i915) >= 10) { in gen6_rps_init()
1344 else if (INTEL_GEN(i915) >= 9) in intel_rps_enable()
1346 else if (INTEL_GEN(i915) >= 8) in intel_rps_enable()
1348 else if (INTEL_GEN(i915) >= 6) in intel_rps_enable()
[all …]
Dselftest_llc.c48 intel_gpu_freq(rps, gpu_freq * (INTEL_GEN(i915) >= 9 ? GEN9_FREQ_SCALER : 1)), in gen6_verify_ring_freq()
58 intel_gpu_freq(rps, gpu_freq * (INTEL_GEN(i915) >= 9 ? GEN9_FREQ_SCALER : 1)), in gen6_verify_ring_freq()
Dintel_gt_clock_utils.c16 if (INTEL_GEN(gt->i915) >= 11) { in read_clock_frequency()
30 } else if (INTEL_GEN(gt->i915) >= 9) { in read_clock_frequency()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
Dintel_device_info.c194 if (INTEL_GEN(dev_priv) <= 4) { in read_timestamp_frequency()
202 } else if (INTEL_GEN(dev_priv) <= 8) { in read_timestamp_frequency()
210 } else if (INTEL_GEN(dev_priv) <= 9) { in read_timestamp_frequency()
228 } else if (INTEL_GEN(dev_priv) <= 12) { in read_timestamp_frequency()
242 if (INTEL_GEN(dev_priv) <= 10) in read_timestamp_frequency()
395 if (INTEL_GEN(dev_priv) >= 10) { in intel_device_info_runtime_init()
409 else if (INTEL_GEN(dev_priv) >= 11) in intel_device_info_runtime_init()
431 } else if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)) { in intel_device_info_runtime_init()
463 } else if (HAS_DISPLAY(dev_priv) && INTEL_GEN(dev_priv) >= 9) { in intel_device_info_runtime_init()
478 if (INTEL_GEN(dev_priv) >= 12 && in intel_device_info_runtime_init()
[all …]
Di915_gpu_error.c439 if (ee->engine->class != RENDER_CLASS || INTEL_GEN(m->i915) <= 3) in error_print_instdone()
445 if (INTEL_GEN(m->i915) <= 6) in error_print_instdone()
458 if (INTEL_GEN(m->i915) < 12) in error_print_instdone()
547 if (INTEL_GEN(m->i915) >= 4) { in error_print_engine()
556 if (INTEL_GEN(m->i915) >= 6) { in error_print_engine()
563 if (INTEL_GEN(m->i915) >= 8) { in error_print_engine()
714 if (INTEL_GEN(m->i915) >= 8) in err_print_gt()
727 if (INTEL_GEN(m->i915) >= 12) { in err_print_gt()
1101 if (INTEL_GEN(uncore->i915) >= 6) { in gt_record_fences()
1106 } else if (INTEL_GEN(uncore->i915) >= 4) { in gt_record_fences()
[all …]
Di915_debugfs.c499 } else if (INTEL_GEN(dev_priv) >= 11) { in i915_interrupt_info()
524 } else if (INTEL_GEN(dev_priv) >= 8) { in i915_interrupt_info()
625 if (INTEL_GEN(dev_priv) >= 11) { in i915_interrupt_info()
645 } else if (INTEL_GEN(dev_priv) >= 6) { in i915_interrupt_info()
840 } else if (INTEL_GEN(dev_priv) >= 6) { in i915_frequency_info()
864 if (INTEL_GEN(dev_priv) >= 9) in i915_frequency_info()
890 if (INTEL_GEN(dev_priv) >= 11) { in i915_frequency_info()
899 } else if (INTEL_GEN(dev_priv) >= 8) { in i915_frequency_info()
922 if (INTEL_GEN(dev_priv) <= 10) in i915_frequency_info()
929 (gt_perf_status & (INTEL_GEN(dev_priv) >= 9 ? 0x1ff00 : 0xff00)) >> 8); in i915_frequency_info()
[all …]
Di915_irq.c168 if (INTEL_GEN(dev_priv) >= 11) in intel_hpd_init_pins()
172 else if (INTEL_GEN(dev_priv) >= 8) in intel_hpd_init_pins()
174 else if (INTEL_GEN(dev_priv) >= 7) in intel_hpd_init_pins()
454 if (INTEL_GEN(dev_priv) < 5) in i915_pipestat_enable_mask()
556 if (INTEL_GEN(dev_priv) >= 4) in i915_enable_asle_pipestat()
819 bool use_scanline_counter = INTEL_GEN(dev_priv) >= 5 || in i915_get_crtc_scanoutpos()
1228 (INTEL_GEN(dev_priv) >= 8 && pipe_crc->skipped == 1)) { in display_pipe_crc_irq_handler()
1273 if (INTEL_GEN(dev_priv) >= 3) in i9xx_pipe_crc_irq_handler()
1278 if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)) in i9xx_pipe_crc_irq_handler()
2076 if (INTEL_GEN(i915) >= 6) in ilk_irq_handler()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/selftests/
Digt_spinner.c137 if (INTEL_GEN(rq->engine->i915) >= 8) { in igt_spinner_create_request()
141 } else if (INTEL_GEN(rq->engine->i915) >= 6) { in igt_spinner_create_request()
145 } else if (INTEL_GEN(rq->engine->i915) >= 4) { in igt_spinner_create_request()
157 if (INTEL_GEN(rq->engine->i915) >= 8) in igt_spinner_create_request()
161 else if (INTEL_GEN(rq->engine->i915) >= 6) in igt_spinner_create_request()
179 if (INTEL_GEN(rq->engine->i915) <= 5) in igt_spinner_create_request()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_fbc.c72 else if (INTEL_GEN(dev_priv) >= 8) in intel_fbc_calculate_cfb_size()
225 if (INTEL_GEN(dev_priv) >= 6) in intel_fbc_recompress()
227 else if (INTEL_GEN(dev_priv) >= 4) in intel_fbc_recompress()
357 if (INTEL_GEN(dev_priv) >= 5) in intel_fbc_hw_is_active()
374 if (INTEL_GEN(dev_priv) >= 7) in intel_fbc_hw_activate()
376 else if (INTEL_GEN(dev_priv) >= 5) in intel_fbc_hw_activate()
392 if (INTEL_GEN(dev_priv) >= 5) in intel_fbc_hw_deactivate()
429 if (INTEL_GEN(i915) >= 5 || IS_G4X(i915)) in intel_fbc_cfb_base_max()
476 if (ret && INTEL_GEN(dev_priv) <= 4) { in find_compression_threshold()
507 if (INTEL_GEN(dev_priv) >= 5) in intel_fbc_alloc_cfb()
[all …]
Dintel_psr.c121 if (INTEL_GEN(dev_priv) >= 12) { in psr_irq_control()
186 if (INTEL_GEN(dev_priv) >= 12) { in intel_psr_irq_handler()
207 if (INTEL_GEN(dev_priv) >= 9) { in intel_psr_irq_handler()
331 if (INTEL_GEN(dev_priv) >= 9 && in intel_psr_init_dpcd()
412 if (INTEL_GEN(dev_priv) >= 8) in intel_psr_enable_sink()
426 if (INTEL_GEN(dev_priv) >= 11) in intel_psr1_get_tp_time()
497 if (INTEL_GEN(dev_priv) >= 8) in hsw_activate_psr1()
534 if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) in hsw_activate_psr2()
540 if (INTEL_GEN(dev_priv) >= 12) { in hsw_activate_psr2()
551 } else if (INTEL_GEN(dev_priv) >= 9) { in hsw_activate_psr2()
[all …]
Dintel_cdclk.c1354 if (INTEL_GEN(dev_priv) >= 11) in bxt_de_pll_readout()
1376 if (INTEL_GEN(dev_priv) >= 10) in bxt_de_pll_readout()
1392 if (INTEL_GEN(dev_priv) >= 12) in bxt_get_cdclk()
1394 else if (INTEL_GEN(dev_priv) >= 11) in bxt_get_cdclk()
1412 IS_GEMINILAKE(dev_priv) || INTEL_GEN(dev_priv) >= 10, in bxt_get_cdclk()
1420 drm_WARN(&dev_priv->drm, INTEL_GEN(dev_priv) >= 10, in bxt_get_cdclk()
1509 if (INTEL_GEN(dev_priv) >= 12) { in bxt_cdclk_cd2x_pipe()
1514 } else if (INTEL_GEN(dev_priv) >= 11) { in bxt_cdclk_cd2x_pipe()
1537 if (INTEL_GEN(dev_priv) >= 10) in bxt_set_cdclk()
1570 IS_GEMINILAKE(dev_priv) || INTEL_GEN(dev_priv) >= 10, in bxt_set_cdclk()
[all …]
Dintel_ddi.c1169 if (INTEL_GEN(dev_priv) >= 12) { in intel_ddi_hdmi_level()
1177 } else if (INTEL_GEN(dev_priv) == 11) { in intel_ddi_hdmi_level()
1304 if (INTEL_GEN(dev_priv) < 10 && !IS_GEMINILAKE(dev_priv)) { in intel_wait_ddi_buf_active()
1672 if (INTEL_GEN(dev_priv) >= 12) in intel_ddi_transcoder_func_reg_val_get()
1740 if (INTEL_GEN(dev_priv) >= 12) { in intel_ddi_transcoder_func_reg_val_get()
1772 if (INTEL_GEN(dev_priv) >= 11) { in intel_ddi_enable_transcoder_func()
1818 if (INTEL_GEN(dev_priv) >= 11) in intel_ddi_disable_transcoder_func()
1832 if (INTEL_GEN(dev_priv) >= 12) { in intel_ddi_disable_transcoder_func()
1996 if (INTEL_GEN(dev_priv) >= 12) { in intel_ddi_get_encoder_pipes()
2138 if (INTEL_GEN(dev_priv) >= 12) in intel_ddi_enable_pipe_clock()
[all …]
Dintel_display_debugfs.c60 if (INTEL_GEN(dev_priv) >= 8) in i915_fbc_status()
62 else if (INTEL_GEN(dev_priv) >= 7) in i915_fbc_status()
64 else if (INTEL_GEN(dev_priv) >= 5) in i915_fbc_status()
85 if (INTEL_GEN(dev_priv) < 7 || !HAS_FBC(dev_priv)) in i915_fbc_false_color_get()
98 if (INTEL_GEN(dev_priv) < 7 || !HAS_FBC(dev_priv)) in i915_fbc_false_color_set()
130 if (INTEL_GEN(dev_priv) >= 8) { in i915_ips_status()
152 if (INTEL_GEN(dev_priv) >= 9) in i915_sr_status()
520 if (INTEL_GEN(dev_priv) >= 12) { in i915_dmc_info()
1030 if (INTEL_GEN(dev_priv) < 9) in i915_ddb_info()
1182 switch (INTEL_GEN(i915)) { in i915_lpsp_status()
[all …]
Dintel_dp_mst.c179 if (INTEL_GEN(dev_priv) < 12) in intel_dp_mst_transcoder_mask()
230 if (INTEL_GEN(dev_priv) < 12) in intel_dp_mst_atomic_master_trans_check()
388 INTEL_GEN(dev_priv) >= 12 && last_mst_stream && in intel_mst_post_disable_dp()
412 if (INTEL_GEN(dev_priv) >= 9) in intel_mst_post_disable_dp()
438 if (INTEL_GEN(dev_priv) < 12 || !last_mst_stream) in intel_mst_post_disable_dp()
486 INTEL_GEN(dev_priv) >= 12 && first_mst_stream && in intel_mst_pre_enable_dp()
519 if (INTEL_GEN(dev_priv) < 12 || !first_mst_stream) in intel_mst_pre_enable_dp()
821 if (INTEL_GEN(dev_priv) < 12) { in intel_dp_add_mst_connector()
933 if (INTEL_GEN(i915) < 12 && port == PORT_A) in intel_dp_mst_encoder_init()
936 if (INTEL_GEN(i915) < 11 && port == PORT_E) in intel_dp_mst_encoder_init()
Dintel_sprite.c348 return INTEL_GEN(dev_priv) >= 11 && in icl_is_nv12_y_plane()
354 return INTEL_GEN(dev_priv) >= 11 && in icl_is_hdr_plane()
367 if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) { in skl_plane_ratio()
390 if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) in skl_plane_min_cdclk()
591 if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) in skl_program_plane()
619 if (INTEL_GEN(dev_priv) < 12) in skl_program_plane()
627 if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) in skl_program_plane()
644 if (INTEL_GEN(dev_priv) < 11) in skl_program_plane()
1880 return INTEL_GEN(to_i915(fb->dev)) >= 11; in intel_fb_scalable()
1958 if (INTEL_GEN(dev_priv) < 7) { in g4x_sprite_check()
[all …]
Dintel_vga.c19 else if (INTEL_GEN(i915) >= 5) in intel_vga_cntrl_reg()
99 unsigned int reg = INTEL_GEN(i915) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL; in intel_vga_set_state()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gem/
Di915_gem_tiling.c65 if (INTEL_GEN(i915) >= 4) { in i915_gem_fence_size()
105 if (INTEL_GEN(i915) >= 4) in i915_gem_fence_alignment()
133 if (INTEL_GEN(i915) >= 7) { in i915_tiling_ok()
136 } else if (INTEL_GEN(i915) >= 4) { in i915_tiling_ok()

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