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Searched refs:MAX_INSTANCE (Results 1 – 16 of 16) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
Drv1_clk_mgr_vbios_smu.c31 #define MAX_INSTANCE 5 macro
39 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Dnavi14_reg_init.c33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in navi14_reg_base_init()
Dnavi10_reg_init.c33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in navi10_reg_base_init()
Dnavi12_reg_init.c33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in navi12_reg_base_init()
Dsienna_cichlid_reg_init.c34 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in sienna_cichlid_reg_base_init()
Darct_reg_init.c33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in arct_reg_base_init()
Dvega10_reg_init.c33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in vega10_reg_base_init()
Dvega20_reg_init.c33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in vega20_reg_base_init()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h24 #define MAX_INSTANCE 6 macro
33 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Dnavi12_ip_offset.h24 #define MAX_INSTANCE 7 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Dvega20_ip_offset.h24 #define MAX_INSTANCE 6 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Dnavi14_ip_offset.h24 #define MAX_INSTANCE 7 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Dsienna_cichlid_ip_offset.h24 #define MAX_INSTANCE 7 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Dvega10_ip_offset.h24 #define MAX_INSTANCE 5 macro
34 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Drenoir_ip_offset.h24 #define MAX_INSTANCE 7 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
Darct_ip_offset.h24 #define MAX_INSTANCE 8 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];