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Searched refs:MPLL (Results 1 – 11 of 11) sorted by relevance

/kernel/linux/linux-5.10/include/dt-bindings/clock/
Ds3c2410.h22 #define MPLL 2 macro
Ds3c2412.h22 #define MPLL 2 macro
Ds3c2443.h26 #define MPLL 7 macro
/kernel/linux/linux-5.10/drivers/clk/samsung/
Dclk-s3c2410.c109 ALIAS(MPLL, NULL, "mpll"),
155 [mpll] = PLL(pll_s3c2410_mpll, MPLL, "mpll", "xti",
221 [mpll] = PLL(pll_s3c2440_mpll, MPLL, "mpll", "xti",
Dclk-s3c2412.c101 PLL(pll_s3c2440_mpll, MPLL, "mpll", "xti", LOCKTIME, MPLLCON, NULL),
155 ALIAS(MPLL, NULL, "mpll"),
Dclk-s3c2443.c148 ALIAS(MPLL, NULL, "mpll"),
182 PLL(pll_6552_s3c2416, MPLL, "mpll", "mpllref", LOCKCON0, MPLLCON, NULL),
234 PLL(pll_3000, MPLL, "mpll", "mpllref", LOCKCON0, MPLLCON, NULL),
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dmdio-mux-meson-g12a.txt14 * "clkin1" : SoC 50MHz MPLL
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dmvebu-core-clock.txt38 3 = mpll (MPLL Clock)
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dexynos5422-odroid-core.dtsi41 /* derived from 532MHz MPLL */
133 /* derived from 532MHz MPLL */
181 /* derived from 532MHz MPLL */
/kernel/linux/linux-5.10/drivers/clk/ingenic/
Djz4780-cgu.c301 .pll = DEF_PLL(MPLL),
/kernel/linux/patches/linux-5.10/unionpi_tiger_pacth/
Dlinux-5.10.patch24966 +#define SD_EMMC_CLOCK_SRC_MPLL 2 /* MPLL */