Searched refs:M_TX_FIFO_WATERMARK_EN (Results 1 – 5 of 5) sorted by relevance
392 M_TX_FIFO_WATERMARK_EN, true)); in qcom_geni_serial_poll_put_char()394 writel(M_TX_FIFO_WATERMARK_EN, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_poll_put_char()446 M_TX_FIFO_WATERMARK_EN, true)) in __qcom_geni_serial_console_write()451 writel(M_TX_FIFO_WATERMARK_EN, uport->membase + in __qcom_geni_serial_console_write()512 writel(irq_en | M_TX_FIFO_WATERMARK_EN, in qcom_geni_serial_console_write()608 irq_en |= M_TX_FIFO_WATERMARK_EN | M_CMD_DONE_EN; in qcom_geni_serial_start_tx()621 irq_en &= ~(M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN); in qcom_geni_serial_stop_tx()765 if (!(irq_en & M_TX_FIFO_WATERMARK_EN)) in qcom_geni_serial_handle_tx()766 writel(irq_en | M_TX_FIFO_WATERMARK_EN, in qcom_geni_serial_handle_tx()799 writel(M_TX_FIFO_WATERMARK_EN, in qcom_geni_serial_handle_tx()[all …]
271 val |= M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN; in geni_se_select_fifo_mode()295 val &= ~(M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN); in geni_se_select_dma_mode()
166 #define M_TX_FIFO_WATERMARK_EN BIT(30) macro
265 m_stat & M_TX_FIFO_WATERMARK_EN) { in geni_i2c_irq()
596 if (m_irq & M_TX_FIFO_WATERMARK_EN) in geni_spi_isr()