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Searched refs:OSSSYS_BASE (Results 1 – 15 of 15) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Dnavi14_reg_init.c44 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in navi14_reg_base_init()
Dnavi10_reg_init.c44 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in navi10_reg_base_init()
Dnavi12_reg_init.c44 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in navi12_reg_base_init()
Dsienna_cichlid_reg_init.c45 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in sienna_cichlid_reg_base_init()
Darct_reg_init.c43 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in arct_reg_base_init()
Dvega10_reg_init.c46 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in vega10_reg_base_init()
Dvega20_reg_init.c45 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in vega20_reg_base_init()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h103 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0, 0, 0, 0, 0 } }, variable
Dnavi12_ip_offset.h137 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0x0240A000, 0, 0, 0 } }, variable
Dvega20_ip_offset.h105 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0, 0, 0, 0, 0 } }, variable
Dnavi14_ip_offset.h137 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0x0240A000, 0, 0, 0 } }, variable
Dsienna_cichlid_ip_offset.h137 static const struct IP_BASE OSSSYS_BASE = { { { { 0x000010A0, 0x0240A000, 0, 0, 0 } }, variable
Dvega10_ip_offset.h163 static const struct IP_BASE OSSSYS_BASE = { { { { 0x000010A0, 0, 0, 0, 0 } }, variable
Drenoir_ip_offset.h177 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0x0240A000, 0, 0, 0 } }, variable
Darct_ip_offset.h119 static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0x00012500, 0x0040A000, 0, … variable