| /kernel/uniproton/src/arch/cpu/armv7-m/common/hwi/ |
| D | prt_hwi_internal.h | 72 #define OS_NVIC_EXCPRI_BASE 0xE000ED18UL macro
107 *(volatile U8 *)((uintptr_t)OS_NVIC_EXCPRI_BASE + ((excNum) - 4)) = (U8)(pri); \
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| /kernel/liteos_m/arch/arm/cortex-m7/gcc/ |
| D | los_arch_interrupt.h | 240 #define OS_NVIC_EXCPRI_BASE 0xE000ED18 macro
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| D | los_interrupt.c | 189 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m4/iar/ |
| D | los_arch_interrupt.h | 240 #define OS_NVIC_EXCPRI_BASE 0xE000ED18 macro
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| /kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/ |
| D | los_arch_interrupt.h | 240 #define OS_NVIC_EXCPRI_BASE 0xE000ED18 macro
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| D | los_interrupt.c | 191 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/ |
| D | los_arch_interrupt.h | 240 #define OS_NVIC_EXCPRI_BASE 0xE000ED18 macro
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| D | los_interrupt.c | 191 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/ |
| D | los_arch_interrupt.h | 240 #define OS_NVIC_EXCPRI_BASE 0xE000ED18 macro
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| D | los_interrupt.c | 191 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m7/iar/ |
| D | los_arch_interrupt.h | 240 #define OS_NVIC_EXCPRI_BASE 0xE000ED18 macro
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| /kernel/liteos_m/arch/arm/cortex-m55/gcc/NTZ/ |
| D | los_arch_interrupt.h | 233 #define OS_NVIC_EXCPRI_BASE 0xE000ED18 macro
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| D | los_interrupt.c | 194 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m33/gcc/NTZ/ |
| D | los_arch_interrupt.h | 240 #define OS_NVIC_EXCPRI_BASE 0xE000ED18 macro
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| D | los_interrupt.c | 191 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/ |
| D | los_arch_interrupt.h | 240 #define OS_NVIC_EXCPRI_BASE 0xE000ED18 macro
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| D | los_interrupt.c | 191 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/ |
| D | los_arch_interrupt.h | 240 #define OS_NVIC_EXCPRI_BASE 0xE000ED18 macro
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| /kernel/liteos_m/arch/arm/cortex-m4/gcc/ |
| D | los_arch_interrupt.h | 240 #define OS_NVIC_EXCPRI_BASE 0xE000ED18 macro
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| D | los_interrupt.c | 190 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m3/keil/ |
| D | los_arch_interrupt.h | 242 #define OS_NVIC_EXCPRI_BASE 0xE000ED18 macro
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| D | los_interrupt.c | 189 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL in OsExcNvicDump()
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| /kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/ |
| D | los_arch_interrupt.h | 240 #define OS_NVIC_EXCPRI_BASE 0xE000ED18 macro
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| D | los_interrupt.c | 191 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL in OsExcNvicDump()
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| /kernel/liteos_m/components/exchook/ |
| D | los_exc_info.c | 102 (const VOID *)OS_NVIC_EXCPRI_BASE, OS_NVIC_EXCPRI_SIZE); in OsExcSaveIntStatus()
|