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Searched refs:OS_NVIC_VTOR (Results 1 – 16 of 16) sorted by relevance

/kernel/uniproton/src/arch/cpu/armv7-m/cortex-m4/
Dprt_vector.S50 OS_NVIC_VTOR = 0xE000ED08 define
80 LDR R1, =OS_NVIC_VTOR
/kernel/uniproton/src/arch/cpu/armv7-m/common/hwi/
Dprt_hwi_internal.h60 #define OS_NVIC_VTOR 0xE000ED08UL macro
Dprt_hwi.c68 *(volatile U32 *)OS_NVIC_VTOR = (U32)(uintptr_t)g_hwiTable; in OsHwiGICInit()
/kernel/liteos_m/arch/arm/cortex-m7/gcc/
Dlos_arch_interrupt.h228 #define OS_NVIC_VTOR 0xE000ED08 macro
/kernel/liteos_m/arch/arm/cortex-m4/iar/
Dlos_arch_interrupt.h228 #define OS_NVIC_VTOR 0xE000ED08 macro
/kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/
Dlos_arch_interrupt.h228 #define OS_NVIC_VTOR 0xE000ED08 macro
/kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/
Dlos_arch_interrupt.h228 #define OS_NVIC_VTOR 0xE000ED08 macro
/kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/
Dlos_arch_interrupt.h228 #define OS_NVIC_VTOR 0xE000ED08 macro
/kernel/liteos_m/arch/arm/cortex-m7/iar/
Dlos_arch_interrupt.h228 #define OS_NVIC_VTOR 0xE000ED08 macro
/kernel/liteos_m/arch/arm/cortex-m55/gcc/NTZ/
Dlos_arch_interrupt.h221 #define OS_NVIC_VTOR 0xE000ED08 macro
/kernel/liteos_m/arch/arm/cortex-m33/gcc/NTZ/
Dlos_arch_interrupt.h228 #define OS_NVIC_VTOR 0xE000ED08 macro
/kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/
Dlos_arch_interrupt.h228 #define OS_NVIC_VTOR 0xE000ED08 macro
/kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/
Dlos_arch_interrupt.h228 #define OS_NVIC_VTOR 0xE000ED08 macro
/kernel/liteos_m/arch/arm/cortex-m4/gcc/
Dlos_arch_interrupt.h228 #define OS_NVIC_VTOR 0xE000ED08 macro
/kernel/liteos_m/arch/arm/cortex-m3/keil/
Dlos_arch_interrupt.h230 #define OS_NVIC_VTOR 0xE000ED08 macro
/kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/
Dlos_arch_interrupt.h228 #define OS_NVIC_VTOR 0xE000ED08 macro