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Searched refs:PCIE0_BASE__INST1_SEG0 (Results 1 – 5 of 5) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/
Dnavi12_ip_offset.h831 #define PCIE0_BASE__INST1_SEG0 0 macro
Dnavi14_ip_offset.h831 #define PCIE0_BASE__INST1_SEG0 0 macro
Dsienna_cichlid_ip_offset.h838 #define PCIE0_BASE__INST1_SEG0 0 macro
Drenoir_ip_offset.h1081 #define PCIE0_BASE__INST1_SEG0 0 macro
Darct_ip_offset.h869 #define PCIE0_BASE__INST1_SEG0 0 macro