| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| D | s3c2410.h | 40 #define PCLK_PWM 25 macro
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| D | s3c2412.h | 52 #define PCLK_PWM 43 macro
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| D | s3c2443.h | 78 #define PCLK_PWM 82 macro
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| D | samsung,s3c64xx-clock.h | 82 #define PCLK_PWM 67 macro
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| D | rk3036-cru.h | 71 #define PCLK_PWM 350 macro
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| D | exynos7-clk.h | 87 #define PCLK_PWM 10 macro
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| D | rk3128-cru.h | 112 #define PCLK_PWM 350 macro
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| D | rk3228-cru.h | 111 #define PCLK_PWM 350 macro
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| D | rv1108-cru.h | 120 #define PCLK_PWM 269 macro
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| D | rk3288-cru.h | 142 #define PCLK_PWM 350 macro
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| D | rk3328-cru.h | 145 #define PCLK_PWM 214 macro
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| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| D | clk-s3c2412.c | 117 GATE(PCLK_PWM, "pwm", "pclk", CLKCON, 17, 0, 0),
147 ALIAS(PCLK_PWM, NULL, "timers"),
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| D | clk-s3c2410.c | 88 GATE(PCLK_PWM, "pwm", "pclk", CLKCON, 8, 0, 0),
100 ALIAS(PCLK_PWM, NULL, "timers"),
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| D | clk-s3c2443.c | 133 GATE(PCLK_PWM, "pwm", "pclk", PCLKCON, 10, 0, 0),
161 ALIAS(PCLK_PWM, NULL, "timers"),
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| D | clk-s3c64xx.c | 238 GATE_BUS(PCLK_PWM, "pclk_pwm", "pclk", PCLK_GATE, 7),
343 ALIAS(PCLK_PWM, NULL, "timers"),
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | s3c2416.dtsi | 92 clocks = <&clocks PCLK_PWM>;
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| D | rk3036.dtsi | 361 clocks = <&cru PCLK_PWM>;
372 clocks = <&cru PCLK_PWM>;
383 clocks = <&cru PCLK_PWM>;
394 clocks = <&cru PCLK_PWM>;
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| D | rv1108.dtsi | 218 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
230 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
242 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
254 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
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| D | rk322x.dtsi | 399 clocks = <&cru PCLK_PWM>;
410 clocks = <&cru PCLK_PWM>;
421 clocks = <&cru PCLK_PWM>;
432 clocks = <&cru PCLK_PWM>;
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| D | s3c64xx.dtsi | 170 clocks = <&clocks PCLK_PWM>;
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| /kernel/linux/linux-5.10/drivers/clk/rockchip/ |
| D | clk-rk3036.c | 412 GATE(PCLK_PWM, "pclk_pwm", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 10, GFLAGS),
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| D | clk-rk3128.c | 510 GATE(PCLK_PWM, "pclk_pwm", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 10, GFLAGS),
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| D | clk-rk3228.c | 607 GATE(PCLK_PWM, "pclk_rk_pwm", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 7, GFLAGS),
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/ |
| D | rk3328.dtsi | 465 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
476 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
487 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
499 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/ |
| D | exynos7.dtsi | 579 clocks = <&clock_peric0 PCLK_PWM>;
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