| /kernel/linux/linux-5.10/drivers/pinctrl/freescale/ |
| D | pinctrl-imx21.c | 19 #define PE 4 macro
120 MX21_PAD_TEST_WB2 = PAD_ID(PE, 0),
121 MX21_PAD_TEST_WB1 = PAD_ID(PE, 1),
122 MX21_PAD_TEST_WB0 = PAD_ID(PE, 2),
123 MX21_PAD_UART2_CTS = PAD_ID(PE, 3),
124 MX21_PAD_UART2_RTS = PAD_ID(PE, 4),
125 MX21_PAD_PWMO = PAD_ID(PE, 5),
126 MX21_PAD_UART2_TXD = PAD_ID(PE, 6),
127 MX21_PAD_UART2_RXD = PAD_ID(PE, 7),
128 MX21_PAD_UART3_TXD = PAD_ID(PE, 8),
[all …]
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| D | pinctrl-imx27.c | 23 #define PE 4 macro
150 MX27_PAD_USBOTG_NXT = PAD_ID(PE, 0),
151 MX27_PAD_USBOTG_STP = PAD_ID(PE, 1),
152 MX27_PAD_USBOTG_DIR = PAD_ID(PE, 2),
153 MX27_PAD_UART2_CTS = PAD_ID(PE, 3),
154 MX27_PAD_UART2_RTS = PAD_ID(PE, 4),
155 MX27_PAD_PWMO = PAD_ID(PE, 5),
156 MX27_PAD_UART2_TXD = PAD_ID(PE, 6),
157 MX27_PAD_UART2_RXD = PAD_ID(PE, 7),
158 MX27_PAD_UART3_TXD = PAD_ID(PE, 8),
[all …]
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| /kernel/linux/linux-5.10/Documentation/powerpc/ |
| D | pci_iov_resource_on_powernv.rst | 22 A Partitionable Endpoint (PE) is a way to group the various resources
28 There is thus, in HW, a table of PE states that contains a pair of "frozen"
30 cleared independently) for each PE.
32 When a PE is frozen, all stores in any direction are dropped and all loads
54 correspondence between a PCIe RID (bus/dev/fn) with a PE number.
57 - For DMA we then provide an entire address space for each PE that can
66 bridge being triggered. There's a PE# in the interrupt controller
67 descriptor table as well which is compared with the PE# obtained from
96 maps each segment to a PE#. That allows portions of the MMIO space
103 can be assigned to a PE.
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/compressed/ |
| D | efi-header.S | 19 @ PE/COFF signature "MZ" in the first two bytes, so the kernel
36 @ The PE header can be anywhere in the file, but for
38 @ The offset to the PE/COFF header needs to be at offset
41 @ PE/COFF offset, and the "MZ" bytes at offset 0x0.
43 .long pe_header - start @ Offset to the PE header.
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| /kernel/linux/linux-5.10/Documentation/riscv/ |
| D | boot-image-header.rst | 25 u32 res3; /* Reserved for PE COFF offset */
27 This header format is compliant with PE/COFF header and largely inspired from
35 specification needs PE/COFF image header in the beginning of the kernel image
38 point to the rest of the PE/COFF header.
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| /kernel/linux/linux-5.10/arch/m68k/include/asm/ |
| D | MC68328.h | 538 #define PE(x) (1 << (x)) macro
540 #define PE_CSA1 PE(1) /* Use CSA1 as PE(1) */
541 #define PE_CSA2 PE(2) /* Use CSA2 as PE(2) */
542 #define PE_CSA3 PE(3) /* Use CSA3 as PE(3) */
543 #define PE_CSB0 PE(4) /* Use CSB0 as PE(4) */
544 #define PE_CSB1 PE(5) /* Use CSB1 as PE(5) */
545 #define PE_CSB2 PE(6) /* Use CSB2 as PE(6) */
546 #define PE_CSB3 PE(7) /* Use CSB3 as PE(7) */
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| D | MC68EZ328.h | 449 #define PE(x) (1 << (x)) macro
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| /kernel/linux/linux-5.10/Documentation/translations/zh_CN/arm64/ |
| D | booting.txt | 102 u32 res5; /* 保留 （用于 PE COFF 偏移） */
112 res5 是到 PE 文件头的偏移，而 PE 文件头含有 EFI 的启动入口点
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| /kernel/linux/linux-5.10/Documentation/driver-api/ |
| D | vfio.rst | 300 one table per a IOMMU group which is a Partitionable Endpoint (PE)
301 (PE is often a PCI domain but not always).
309 out of the window leads to the whole PE isolation.
318 4) According to sPAPR specification, A Partitionable Endpoint (PE) is an I/O
320 error recovery. A PE may be a single or multi-function IOA (IO Adapter), a
387 * PE, and put child devices belonging to same IOMMU group to the
388 * PE instance for later reference.
391 /* Check the PE's state and make sure it's in functional state */
414 * of the PCI device. Check the PE's state to see if that has been
420 * produce any more PCI traffic from/to the affected PE until
[all …]
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| D | pps.rst | 223 12 PE * *
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| /kernel/linux/linux-5.10/arch/x86/realmode/rm/ |
| D | trampoline_32.S | 53 movw $1, %dx # protected mode (PE) bit
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| D | trampoline_64.S | 73 movl $X86_CR0_PE, %eax # protected mode (PE) bit
|
| /kernel/linux/linux-5.10/crypto/asymmetric_keys/ |
| D | Kconfig | 89 bool "Support for PE file signature verification"
97 signed PE binary.
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| /kernel/linux/linux-5.10/Documentation/admin-guide/ |
| D | efi-stub.rst | 6 as a PE/COFF image, thereby convincing EFI firmware loaders to load
17 masquerades as a PE/COFF image and the EFI stub is linked into the
|
| /kernel/linux/linux-5.10/Documentation/arm/ |
| D | uefi.rst | 34 PE/COFF executable, including a loader application that makes it possible to
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| /kernel/linux/linux-5.10/arch/x86/boot/ |
| D | header.S | 85 # Offset to the PE header.
141 # PE specification requires ImageBase to be 64k aligned
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| /kernel/linux/linux-5.10/Documentation/ABI/testing/ |
| D | sysfs-bus-coresight-devices-etm4x | 21 Description: (Read) Indicates the number of PE comparator inputs that are
98 Description: (RW) Controls which PE to trace.
296 Description: (RW) Access the start stop control register for PE input
329 Description: (RW) Access the selected single show PE comparator control
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| /kernel/linux/linux-5.10/Documentation/arm64/ |
| D | booting.rst | 86 u32 res5; /* reserved (used for PE COFF offset) */
96 res5 is an offset to the PE header and the PE header has the EFI
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| /kernel/linux/linux-5.10/Documentation/trace/coresight/ |
| D | coresight-etm4x-reference.rst | 266 Access a single shot PE comparator input control register.
297 Access PE start stop comparator input control registers
590 Number of PE comparator inputs
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| /kernel/linux/linux-5.10/drivers/media/dvb-frontends/ |
| D | bcm3510_priv.h | 301 u8 PE :1; /* baud clock pin */ member
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/allwinner/ |
| D | sun50i-a64-bananapi-m64.dts | 211 * This regulator also drives the PE pingroup GPIOs,
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | sun7i-a20-bananapi.dts | 224 /* PE */
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| /kernel/linux/linux-5.10/arch/x86/kernel/ |
| D | head_32.S | 306 andl $0x80000011,%eax # Save PG,PE,ET
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| /kernel/linux/linux-5.10/Documentation/virt/kvm/devices/ |
| D | arm-vgic-its.rst | 179 - RDBase is the PE number (GICR_TYPER.Processor_Number semantic),
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| /kernel/linux/linux-5.10/Documentation/i2c/busses/ |
| D | i2c-i801.rst | 162 Here the host bridge ID is 2570 (82865G/PE/P), the subvendor ID is 1043
|