Searched refs:PORT_LOGIC_LINK_WIDTH_4_LANES (Results 1 – 2 of 2) sorted by relevance
68 #define PORT_LOGIC_LINK_WIDTH_4_LANES PORT_LOGIC_LINK_WIDTH(0x4) macro
647 val |= PORT_LOGIC_LINK_WIDTH_4_LANES; in dw_pcie_setup()