Searched refs:PORT_LOGIC_LINK_WIDTH_8_LANES (Results 1 – 2 of 2) sorted by relevance
69 #define PORT_LOGIC_LINK_WIDTH_8_LANES PORT_LOGIC_LINK_WIDTH(0x8) macro
650 val |= PORT_LOGIC_LINK_WIDTH_8_LANES; in dw_pcie_setup()